Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12453 Discussions

Data Transfer Between Nios II and DDR

Altera_Forum
Honored Contributor II
793 Views

I would like to know if its possible to transfer data from Nios II to a DDR. 

I understand the transfer has to a Avalon MM interface . 

 

My question is it there an Altera IP which can be used initiate the data transfer. 

Or Is there an example which I can generate and simulate ??
0 Kudos
0 Replies
Reply