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Altera_Forum
Honored Contributor I
1,264 Views

Difference between "buffering in on-chip ram" and "assigning data to the on-chip ram"

Hi,  

 

Forgive the newbie question. 

 

What is the difference between "buffering in on-chip ram" and "assigning a data or writing/reading to/from the on-chip ram"?  

 

How are they different from the perspective of programming?  

 

Or I should say how to write a C code for buffering?  

 

 

Is it same as assigning the data to an array (just like normal array assignment in C code?) 

 

Thank you in advance.
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Altera_Forum
Honored Contributor I
42 Views

I dont know if this is feasible. What I am tempted to do, since the rate I can plot a graph is slower than the rate the incoming signal is read. 

 

If I know the beginning of every incoming signal let say this point is indicated by a count=0, everytime I detect count=0, I know it is the beginning of each incoming signal, I keep track of how many cycles, let say, I only want to plot the graph every 10 cycles of the incoming signals, I plot cycle no.1, skip 10 cycles, plot cycle no. 11, skip cycle no.12 to 20, next plot cycle no. 21 etc ...in other words, it means I will lose some cycles in between which I am okay with this. 

 

1. Do you think this method make any sense? 

 

2. Do I still need buffering in this case? 

 

3. How do I know how many cycles I need to skip? I assume it would depend on the incoming signal rate (50 Hz) and plot/receive rate (say 8 Hz), But I am not entirely clear about how to calculate... 

 

The incoming signal (50 Hz) is from fpga vhdl, NIos system can read at 50 Mhz, but serial port receive rate or Matlab plot rate is 8 Hz. 

 

Appreciate any input...thank you
Altera_Forum
Honored Contributor I
42 Views

I see you are somewhat lost in terminology of buffering/ram etc. Let us talk about bitrate (rather than frequency). If you have a bottleneck in the serial port nothing can help as any buffer (ram or registers) will soon overflow.  

I wonder why serial port has limit of 8 Hz.  

Remember frequency = sample rate/samples per cycle. 

I assume a UART speed can be 9600 bps so if your sample width is 10 bits you can have 960 samples/sec and so can sample a tone at 480 Hz as two samples per cycle or you can sample any frequency lower till dc by having more than 2 samples/sec. For 1Hz @ 960 samples/sec you will have 960 samples per second. for 50 Hz you will have 960/50 samples/sec. So what is the problem?
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