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Altera_Forum
Honored Contributor I
1,896 Views

Downloading ELF file onto target NIOS processor Failed

Hello, 

When I build and download my Hello World application using the 'Run Configurations' GUI menu in Eclipse, I get a 'verify failed' error. Anyone know what this indicates and how I can resolve this? 

Below is the error I get when I try to run my application. 

Thanks, 

Nishanth 

 

using cable “usb-blaster [usb-0]”, device 1, instance 0x00 

processor is already paused 

reading system id at address 0x00002080: verified 

initializing cpu cache (if present) 

ok 

 

downloading 02000000 ( 0%) 

downloading 08000000 ( 0%) 

downloading 080111f0 (89%) 

downloaded 69kb in 2.2s (31.3kb/s) 

 

verifying 02000000 ( 0%) 

verifying 08000000 ( 0%) 

verify failed between address 0x8000000 and 0x800f653 

leaving target processor paused
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11 Replies
Altera_Forum
Honored Contributor I
109 Views

What is located at the failure address?

Altera_Forum
Honored Contributor I
109 Views

I am assuming the executable I just downloaded.  

 

downloading 02000000 ( 0%) 

downloading 08000000 ( 0%) 

downloading 080111f0 (89%) 

downloaded 69kb in 2.2s (31.3kb/s)
Altera_Forum
Honored Contributor I
109 Views

Let me rephrase that....which hardware component (memory, epcs, etc.) is located at the failing address: 

 

Verify failed between address 0x8000000 and 0x800F653
Altera_Forum
Honored Contributor I
109 Views

Try to run it from an onchip memory, i presume you are running it from some external memory... 

(if it works with onchip it is for sure a timing problem, take a look on how to configure the PLL degrees of an external mem)
Altera_Forum
Honored Contributor I
109 Views

It is running on external SDRAM. Thank you very much for the suggestion. I will try running it on on-chip ram and see if it makes a difference.

Altera_Forum
Honored Contributor I
109 Views

Hello there, I'm having the same problem here since I set my NIOS reset_vector to the external EPCS flash memory from the external SDRAM. 

But, if I make a JIC with my Sof and Elf files and then burn the flash, it works fine. Otherwise (with the reset vector at SDRAM) the software would not boot. Make sure your reset_vector is at SDRAM so it will not load the software image at flash upon your just downloaded elf at sdram.
Altera_Forum
Honored Contributor I
109 Views

That did it. Thanks, wgutstein! and everyone else for the support.

Altera_Forum
Honored Contributor I
109 Views

BTW the correct way to do this is to set reset vector to a non-volatile memory, say ext_flast and the rest to sd_ram. 

It should work in any case - whether you run from a flash or dowloading sof and run sw in the nios tools.
Altera_Forum
Honored Contributor I
109 Views

make sure you have download the programming file .sof or .pof in your FPGA

Altera_Forum
Honored Contributor I
109 Views

typical error, probably clock problem of a external memory

Altera_Forum
Honored Contributor I
109 Views

 

--- Quote Start ---  

Hello there, I'm having the same problem here since I set my NIOS reset_vector to the external EPCS flash memory from the external SDRAM. 

But, if I make a JIC with my Sof and Elf files and then burn the flash, it works fine. Otherwise (with the reset vector at SDRAM) the software would not boot. Make sure your reset_vector is at SDRAM so it will not load the software image at flash upon your just downloaded elf at sdram. 

--- Quote End ---  

 

 

 

If the nios app is linking the application to execute from RAM (on-chip or external), the reset vector shouldn't matter. The Nios IDE should download the application to RAM and not try downloading/verify what's at the reset memory (flash). 

 

Otherwise, you'd need to have one qsys version that has the reset pointing to RAM, and another non-debug version that has it pointing to flash. Who does this?
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