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Dynamic addressing and 32 bit i/f

Altera_Forum
Honored Contributor II
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Ok, this has probably been posted a million times before, but I can't find it, and I can't remember how it's done. I have an SOPC Builder component with a 32-bit slave interface. It has 8-bits of address. I've tried multiple ways of connecting it, including Native and Dynamic interface and remapping the address bits, but I can never get 32-bit access to it. 

 

If I try within the Nios Debugger to access the memory, and try and write a word using the "Memory Viewer", it seems to write 4 bytes, rather than 1 word, but this corrupts 4 whole words within my component. ie if I write 12345678 to address 0, then I get 12121212 12121212 12121212 12121212 at the first 16 (byte) addresses or sometimes 78787878 78787878 78787878 78787878 depending on exactly what mode I used. But I can't get it to write 12345678. What am I doing wrong? 

 

Cheers, 

Simon
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Altera_Forum
Honored Contributor II
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Sounds like a fubar with the byte enables. 

Maybe the debugger always does byte writes?? 

It might also be that you are also (somehow) connected to A7..A0 instead of A9..A2.
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Altera_Forum
Honored Contributor II
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Ok, thanks. Was a combination of things, I think. The main one being that the debugger will use byte access unless forced to do otherwise. Since the byte enables weren't being used in the component, I've removed them from the interface, and now the debugger uses 32bit access. Also discovered that the component is expecting 32bit registers every 4 addresses, but now the Avalon bus IS connecting A9..A2 to my A7..A0, so have recompiled with the bottom 2 address bits of the component set to 0, and only 6 bits of the address bus connecting to the outside world. This should be enough.

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Altera_Forum
Honored Contributor II
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It is worth noting that the bus width adapter used to convert 64bit access (eg from PCIe) to 32bit always does two cycles - one of which has no asserted byte enables! So ignoring the byte enables can cause grief.

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