I need to enable the LW H2F bridge from HPS in order to access my FPGA logic before loading u-boot. The MPL runs from the FPGA. Actually, I managed to make it work, but I don't know why it works :shock:. Please see the code below. This code will hang on the first attempt to access the LW bridge, BUT if I add: ALT_PRINTF("RSTMGR %08x\n", alt_read_word(SOCFPGA_RSTMGR_ADDRESS)); right after remapping, then the MPL runs fine. I fount this out just by coincident.
releasing_all_peripherals_from_reset(); <--- added by me
warm_reset_handshake_support(); <--- added by me
alt_bridge_init(ALT_BRIDGE_LWH2F, NULL, NULL); <--- added by me
alt_write_word(ALT_L3_REMAP_ADDR, 0x18 | 0x1); // remap 0x0 to OCRAM, Maintain FPGA connection <--- moved from the end of the board_init()
// thaw (un-freeze) all IO banks
sys_mgr_frzctrl_thaw_req(FREEZE_CHANNEL_3, FREEZE_CONTROLLER_FSM_SW); ... ... } Thanks in advance!