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Hi,
I´m pretty new to the FPGA/NIOS topic, so a general question: I noticed that some boards use "physical layer chips" in order to connect a NIOS/FPGAs to interfaces like USB/Ethernet/CAN. Altera boards ususaly use the LAN91C111, other the NS83865 for Ethernet. EZNIOSUSB uses the FT2232C to do USB. Some boards are not using such, so I guess they do it inside the FPGA. My question is what are the absolute minimum requirements to connect above mentioned interfaces with minimum board-space to NIOS/FPGAs and what has to be done outside ? Regards, K.PaulsenLink Copied
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... it depends....
I know a bit about ethernet but not USB. Ethernet requires a media access controller (MAC) which is digital logic that can be off-chip or implemented as an FPGA IP core. The PHY is typically a separate IC unless you're dealing with an ASIC which has one designed in (the reason is that it generates I/O transitions FPGAs don't currently support... MLT-3 I believe). However, I have been told (newsgroup: comp.arch.fpga) that it is possible to do 10mbit half duplex ethernet without a PHY with some creative design techniques. Do a search of that news group and you should find a thread or two on it.
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