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Ethernet on ep3c120 board in VHDL

Altera_Forum
Honored Contributor II
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Hello, 

I'm trying to transform the nios2 mmu design example for ep3c120 devborad in Verilog to VHDL. 

I succeed in booting uClinux on my custom FPGA written in VHDL however I can't get the ethernet TSE MAC to work. 

 

In the design there are: a megawizard entity enet_gtx_clk_ddio_buffer (alt_ddio_component) that I have added and instantiated and also a global_reset_generator (not sure this one is working). 

The compilation under quartus is succefull. 

But when i load de .sof on my board u-boot can't ping or get tftp files because tse is not working in the design. 

 

Does the global reset generator is vital for tse mac ? 

Does somebody have a design example (in VHDL) of ethernet working on this board pls ? 

:(  

Thx
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