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ExplicitAddressSpan for Avalon Memory Mapped Tristate Slave

Altera_Forum
Honored Contributor II
867 Views

Hi there, 

 

I have searched everywhere but couldn't find a definition for the ExplicitAddressSpan parameter of Avalon Memory Mapped Tristate Slave. 

 

From this post (http://www.alteraforum.com/forum/showthread.php?t=29646&highlight=explicitaddressspan), it seems to suggest that it's a parameter to define how much address space you are actually going to use.  

 

What if this parameter is set to 0, does that mean the address space is only defined by the number of address lines? 

 

Regards, 

Hua
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Altera_Forum
Honored Contributor II
101 Views

If I remember correctly explicit span limits the addressable space of the slave. So if you had a component with 10 address bits and 32-bit data that would be a 4kB span. Then you could say the explicit span is 3.5k to limit the span further. I can't think of many reasons why you would want to do this so I recommend that you don't use this feature.

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