For Altera Cyclone III (3c120) dev kit, I have the following connection for ext_flash in my verilog top level:-output [ 24: 0] top_fsa; : : wire [ 24: 0] top_fsa; wire [ 25: 0] top_fsa_alignment; : : assign top_fsa = top_fsa_alignment[25 : 1]; : : .flash_tristate_bridge_address (top_fsa_alignment), Can anyone please tell me how can I do this kind of connection in my block diagram? My ext_flash in SOPC Builder setting is Address Width - 25 Data Width - 16 Any help would be appreciated. Thanks Carid
Draw a bus wire from the sopc component port and leave it unconnected.Double click it and rename it as: " top_fsa[24..0],dummy " Add another bus wire with both sides unconnected and name it top_fsa[24..0], then connect on side to an output pad symbol
Hi Cris72, thanks. But I wish to clarify your answer.Did you mean draw 2 wires using 'Diagonal Bus Tool' and both also named as top_fsa[24..0]? Sorry it doesn't seem very clear to me.