Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++

External bus interface

Altera_Forum
Honored Contributor II
1,113 Views

I'm trying to implement something similar to the MMC interface with the Nios II through DMA and/or Avalon bus. This interface consists of 1 clock and 5 bi-directional data signals. 

 

In the SOPC builder, I've added an interface to user logic with those signals defined, then tried using avalon register slave, avalon memory slave, and avalon master through the bus interface type pull-down selection. However, all gave me some sort of errors messages. 

 

Please advise. Thanks.
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
426 Views

what errors, and when are you getting them?

0 Kudos
Altera_Forum
Honored Contributor II
426 Views

Hmm..I don't know why the same two posts arose when I did the submission. But here (http://www.niosforum.com/forum/index.php?act=st&f=2&t=383) is the continuing discussion.

0 Kudos
Reply