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Altera_Forum

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02-07-2012
10:34 AM

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FPGA square root display

I have written the following program to determine the square root of a number but i m getting difficulty how to display the result ? I have used the mega functions to find the square but unable to proceed as to how to go about displaying the decimal number say square root( 2) = 1.414 on the DE1 board .

will be really thankful if some one could help ! library ieee; USE ieee.std_logic_1164.all; Entity squareroot is port ( clock_50 :in std_logic ; SW : in std_logic vector (9 downto 0); HEX3, HEX2,HEX1,HEX0 : out std_logic vector (6 downto 0); End squareroot; architecture topelevel of squareroot is Component integertoFloatingpoint IS PORT ( clock : IN STD_LOGIC ; dataa : IN STD_LOGIC_VECTOR (31 DOWNTO 0); result : OUT STD_LOGIC_VECTOR (31 downto 0 ); END integertoFloatingpoint; Component squarerootTofloatingpoint IS PORT ( clock : IN STD_LOGIC ; data : IN STD_LOGIC_VECTOR (31 DOWNTO 0); result : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) ); END squarerootTofloatingpoint; Component flotaingpointTofixedpoint IS PORT ( clock : IN STD_LOGIC ; dataa : IN STD_LOGIC_VECTOR (31 DOWNTO 0); result : OUT STD_LOGIC_VECTOR (31 DOWNTO 0) ); END flotaingpointTofixedpoint;Link Copied

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Altera_Forum

Honored Contributor I

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02-07-2012
11:40 AM

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you will need to work out the number in base ten to display it like you want.

Altera_Forum

Honored Contributor I

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02-07-2012
01:11 PM

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You also need to feed in the input from somewhere!

If you are just doing experiments it might be sensible to add a nios cpu and put your logic as an Avalon slave. Then you can use the JTAG UART for IO.- Subscribe to RSS Feed
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