Nios® V/II Embedded Design Suite (EDS)
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Firmware strucking Issue

Altera_Forum
Honored Contributor II
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My firmware receives commands from USB_FIFO,We have tested the firmware in run mode and debug mode and everything works fine. We do not see any issue in these modes.We don’t have external flash memory, so we are fusing the firmware with POF by converting elf file to hex file and compile it to produce POF file.On power up FPGA gets configured with the POF from configuration device and initially firmware works fine. But at some point of time firmware stops responding which was not happening in run mode or debug mode and It is not consistent every time a change is made on the firmware code the issue ends up in some other part of the code in POF mode.There is enough memory left for stack and heap segment also. 

 

-> NOT time-limited IP core. 

 

If someone has come across this issue and found a solution for it please help out...
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Altera_Forum
Honored Contributor II
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Are you using any time-limited IP core?

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