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For weeks, I have been working on Intel® MAX® 10 FPGA Development Kit. Everything was Okay.
Till I add a Uart Rs232, Nios Eclipse IDE shows "Make *** *.elf error". The reason is I connect everything for this UART in Qsys except IRQ because I don't need and also want to save some resource( actually I have plenty). could anybody explain it?Link Copied
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