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Altera_Forum
Honored Contributor I
2,230 Views

GPIO on LTC for de0_nano_soc and sockit

Hi, 

 

I need a GPIO point accessible by a pin (that I can hang a scope probe onto) that is connected to the HPS. I need this on both the de0_nano_soc and sockit boards. 

 

I thought I found such a pin on the LTC connector. On the de0 it is signal HPS_LTC_GPIO shown coming into Bank 7C, HPS_GPIO40 on the schematic.  

 

I've used the Linux GPIO user space interface successfully to toggle the HPS_LED (HPS_GPIO53) and read HPS_KEY (HPS_GPIO54) signals on the board. For example, to toggle the LED: 

# cd /sys/class/gpio# echo 222 > export# cd gpio222# echo "out" > direction# echo 1 > value # LED ON# echo 0 > value # LED OFF 

 

 

If I try the same thing with HPS_LTC_GPIO (GPIO40 - which maps to gpio209), and then measure the pin on the LTC connector, the voltage does not change (low milli-volts). 

 

It looks like all the gpio ports are enabled in my device tree (the LED, KEY, and LTC_GPIO are on the same port anyway so if the LED and KEY work, would expect the LTC_GPIO to work too). 

 

I've also tried to configure the pin as an input and connected it (through a resistor) to both 3.3v and GND and the input state doesn't change... 

 

 

Can anybody suggest what I'm missing?? 

 

Thanks, 

--George Broz 

 

Moog Industrial Group
0 Kudos
7 Replies
Altera_Forum
Honored Contributor I
148 Views

Hello, 

 

I am facing the same problem, have you found a solution ? 

 

Thank you, 

 

Arthur
Altera_Forum
Honored Contributor I
148 Views

Hi Arthur, 

 

Yes and no...  

 

The HPS_LTC_GPIO point is not actually connected to a pin on the LTC connector. The schematic shows a "DNI" next to R105 that I missed initially. I found no other GPIO points to use on the connector. So then my focus shifted to using HPS_I2C1_SDAT and HPS_I2C1_SCLK (which can be used as GPIO) and I was able to do this, but it took a number of steps: 

 

* you have to open a suitable Quartus job (I used ...\DE0-Nano-SoC_v.1.1.0_SystemCD\Demonstrations\SoC_FPGA from the DE0 CD) , open Qsys within it, and in the "Parameters Panel" of the hps_0 component find the "Peripheral Pins" tab. 

* de-select the I2C1 peripheral and then scroll down and "push" (select) the GPIO "buttons" for GPIO 51 and 52. 

* generate the HDL, return to Quartus. 

* Edit the top level port file (e.g. ghrd.v) - you need to remove the lines: 

// .hps_0_hps_io_hps_io_i2c1_inst_SDA ( HPS_I2C1_SDAT ), // .hps_io_i2c1_inst_SDA 

// .hps_0_hps_io_hps_io_i2c1_inst_SCL ( HPS_I2C1_SCLK ), // .hps_io_i2c1_inst_SCL 

* Add instead something like: 

.hps_0_hps_io_hps_io_gpio_inst_GPIO51 ( HPS_LTC_GPIO_SDAT ), // .hps_io_gpio_inst_GPIO51 

.hps_0_hps_io_hps_io_gpio_inst_GPIO52 ( HPS_LTC_GPIO_SCLK ), // .hps_io_gpio_inst_GPIO52 

 

* Also remove:  

inout HPS_I2C1_SCLK, 

inout HPS_I2C1_SDAT, 

 

* Add instead: 

inout HPS_LTC_GPIO_SDAT, 

inout HPS_LTC_GPIO_SCLK, 

 

* Assign voltages for these new pins with the "Pin Planner" under the "Assignments" menu. Find/add the signal names (HPS_LTC_GPIO_SDAT/SCLK) and select 3.3V LVTTL. 

 

* Build the Quartus project. 

 

* When finished, grab the output from the hardware handoff folder (hps_isw_handoff) and use that to build a new u-boot SPL using the Altera EDS tools - I initially followed this process to generate the SPL - https://rocketboards.org/foswiki/view/documentation/gsrd131preloader.  

 

* But generating just the SPL didn't work so I then used the latest u-boot v2016.03 from the u-boot git repo to generate both SPL and u-boot image.  

 

* To do this I used qts-filter.sh found in the u-boot source at .../u-boot/arch/arm/mach-socfpga. 

 

* Applied qts-filter.sh to the output of the BSP Editor run during my first attempt to generate the SPL. 

 

* Dropped the resulting files from qts-filter.sh back into the u-boot source (overwriting the ones that were there) at .../u-boot/board/altera/cyclone5-socdk/qts 

 

* Then I rebuilt u-boot from the top level directory in a crosstools-sourced environment with make socfpga_de0_nano_soc_defconfig , make all 

 

* And.. copied the resulting u-boot-with-spl.sfp product to the 'A2/unknown' partition of the MMC. 

 

 

Of course, if you are unlucky like me, then you have a board that fails memory calibration with the latest u-boot build. It looks something like this: 

 

U-Boot SPL 2016.03 (Mar 28 2016 - 16:34:29) 

drivers/ddr/altera/sequencer.c: Preparing to start memory calibration 

drivers/ddr/altera/sequencer.c: CALIBRATION FAILED 

drivers/ddr/altera/sequencer.c: Calibration complete 

SDRAM calibration failed. 

# ## ERROR# ## Please RESET the board# ## 

 

The u-boot maintainers are looking into this.... In the meantime, I bought a second DE0 board and that one works. (I have two boards that don't, failing memory calibration). 

 

Lastly, disable the I2C1 component from the device tree of the Linux kernel you will boot on the MMC. Once in Linux you will see that you have control over those two GPIO pins. 

 

I was able to control output state via the user space GPIO interface after adding a 10k pull-up resistor to the LTC pins connected to these GPIO points. 

 

 

Simple as that ;) 

 

 

Good luck! 

 

--George Broz 

Moog Industrial Group
Altera_Forum
Honored Contributor I
148 Views

Hello George, 

 

Thank you for all those useful information, especially the DNI resistor. I simply paced r105 and my problem was solved. 

 

The preloader generated with 15.0 tools and atlas-linux-gsrd design works fine for me. 

 

All the best !
Altera_Forum
Honored Contributor I
148 Views

HI Arthur, 

 

I am also trying to access the GPIO 29 ,30 which maps to GPIO198 ,199.But I am unable to control from the linux space.where gpio222 I am able to control.Kindly let me know what all are the changes.also I have compiled the .SOF enabling all the pins through qysy and through enable pins.My top .v file have the link to these pins. 

Kindly let me know what or how should I change in linux to access all the GPIO 1 and GPIO 0 pins. 

 

Thanks  

Ravi chandran
Altera_Forum
Honored Contributor I
148 Views

also should I use input triggered or input trigerred with weak pull up?? 

 

--ravi
Altera_Forum
Honored Contributor I
148 Views

HI Arthur, 

 

I am also trying to access the GPIO 29 ,30 which maps to GPIO198 ,199.But I am unable to control from the linux space.where gpio222 I am able to control.Kindly let me know what all are the changes.also I have compiled the .SOF enabling all the pins through qysy and through enable pins.My top .v file have the link to these pins. 

Kindly let me know what or how should I change in linux to access all the GPIO 1 and GPIO 0 pins. 

also do we need to select input as trigerred or trigerred with weak pull up?? 

 

how do change linux to access all GPIO1 and GPIO 0 pins?? 

 

Thanks  

Ravi chandran
Altera_Forum
Honored Contributor I
148 Views

Hi george, 

 

also would like to know the MSEL settings for FPGA where linux is running on the SD card is "00000"..is this correct??..any change req. 

 

regards 

Ravi
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