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Hardware acceleration with NIOS2 /e ( is it possible ? )

Altera_Forum
Honored Contributor II
999 Views

I´m trying to understand at the several documentations available on Altera website, which are exactly the features available at each NIOS2 core versions, but I must confess that it is not still clear for me. For instance, I wish to know if there exists a limitation at the economy core version to perform any kind of hardware integration between CPU core, and modules wrote at some HDL language. The purpose is not to achieve speed performance, but just to control the execution many concurrent processes wrote at for instance, verilog language. The question arises because it is stated here (http://en.wikipedia.org/wiki/nios_ii#nios_ii_cpu_family) that just the fast core version supports hardware acceleration. 

 

Thanks in advance.
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2 Replies
Altera_Forum
Honored Contributor II
114 Views

You can add an avalon interface to your component and use it from nios economy

Altera_Forum
Honored Contributor II
114 Views

Nice to hear that, thanks a lot. 

I was not aware that this would be possible with this core version.
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