Hello world and simple led blink does not work

[Altera_Forum]

I created a Qsys system with NIOS, JTAG UART, On-chip memory(50 KB), PIO_OUT and assigned base addresses. Successfully programmed the sof file onto target board. 

Now went on creating a simple hello world template and downloaded the application (.elf) via JTAG to FPGA. It does not show up, Hello world on NIOS console. Then I added a simple code to toggle a LED via PIO_OUT, even this did not work. Looks like processor is not entering the main function. I have set the reset vector to on-chip memory and the base address assigned is 0x48040000-0x4804CFFF. But processor is starting from address 0x0000019C. I am confused on this. Can anybody help me on this?

[Altera_Forum]

Could you show a screenshot of the interconnections you made on Qsys ?

[Altera_Forum]

Did you use the 'Hello World Small' template? If you only have on-chip memory available you will have to use the small drivers that are used when using the 'small' software project template. If you haven't then during the building of your project the compiler should identify that there is insufficient memory in your system. 

 Cheers, Alex

[Altera_Forum]

--- Quote Start ---  Did you use the 'Hello World Small' template? If you only have on-chip memory available you will have to use the small drivers that are used when using the 'small' software project template. If you haven't then during the building of your project the compiler should identify that there is insufficient memory in your system.  Cheers, Alex  --- Quote End ---    Hi Alex,  We have built with normal Hello World (not small). However if there was a memory issue, then we would have got the error while building the project itself. However, in our case, we could successfully download .sof file as well as .elf file via JTAG without any issues. Just to cross-check, we added a logic to blink a LED (connected via PIO) and routed to FPGA pin. Even this does not work. We suspect processor not entering main function at all.We have manually assigned the base address to on-chip memory. So, do we need to make any changes in linker script, if we have to assign the address manually? Help is appreciated!!

[Altera_Forum]

--- Quote Start ---  Could you show a screenshot of the interconnections you made on Qsys ?  --- Quote End ---    Hi Andre,  I have attached a word file capturing screenshots of Qsys including address mapping. We have used Quartus v14.1, Windows 7 OS to build the project. .We have manually assigned the base address to on-chip memory. So, do we need to make any changes in linker script, if we have to assign the address manually?

[Altera_Forum]

You have a DDR controller in there in addition to on chip memory. Delete it. Make a backup copy before if you want to keep it. In QSYS, assign base addresses. Make sure your Nios has on chip memory assigned for reset and exceptions. Generate files in QSYS. Make sure your qip file has been added to the Quartus project. Compile in Quartus. In the software build tools, delete your BSP project and re-create it. Move your software source file(s) somewhere else if it has anything you want to keep. Delete your application project. Create a new application project and be sure to use Hello World (small).

[Altera_Forum]

--- Quote Start ---  You have a DDR controller in there in addition to on chip memory. Delete it. Make a backup copy before if you want to keep it. In QSYS, assign base addresses. Make sure your Nios has on chip memory assigned for reset and exceptions. Generate files in QSYS. Make sure your qip file has been added to the Quartus project. Compile in Quartus. In the software build tools, delete your BSP project and re-create it. Move your software source file(s) somewhere else if it has anything you want to keep. Delete your application project. Create a new application project and be sure to use Hello World (small).  --- Quote End ---    Hi Galfonz,  Thanks for the reply. Hello world and led blinking works fine without DDR3 controller. However, things are not working as intended when I introduce DDR3 controller. My final design includes DDR3 controller plus other peripherals. My worry is that why LED blink and JTAG UART does not work when I introduce DDR3 controller. I ensured there is no address overlapping. I have pointed reset vector and exception vector to on-chip memory. One more thing what i observed is during downloading of elf, I could see the message in console "Starting processor at 0x00000000". This is the base address assigned to DDR3 controller. However as my assumption it should start from reset vector (i.e., on-chip memory)

[Altera_Forum]

Check to see if your elf file has the correct start address by using the nios2-elf-nm command in the nios2 shell. If that is OK, try removing your run/debug configuration(s). Use run as ->nios2 hardware so that it will be read from your binary.

[Altera_Forum]

According to my experience, BSP linker tends to assign .text to the largest memory in your system, ie DDR3 memory. If you want to still run from onchip-memory, you will need to modify the linker script via nios2-bsp-editor.  

 I am suspecting issue with the DDR3 path. Is both Nios and DDR3 running at the same clock frequency? Is there any timing failure reported in Quartus?

[Altera_Forum]

Perhaps adding the diagram of code, or the top layer design could give additional info. Have you tried to start a new template design from BSP ? At least this way you could implement the solution incrementally, just adding extra functionalities at a working design.

[Altera_Forum]

I just noticed that the instruction master is not connected to DDR3 controller from the attached document. I think there are 2 ways to proceed: 

1. Check and update linker at nios2-bsp-editor so that the .text/.rwdata/.rodata still points to onchip-memory 2. Connect instruction master to the DDR3 controller and re-generate Qsys + recompile Quartus + re-generate and recompile software