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Honored Contributor I

Help with customer component in Qsys

Hey Altera people  

I am not familiar this but I managed to create my peripheral (vhdl) and integrated it in my design. The problem is when I try to use by C program the result obviously is not what I expect!! 


My entity is : 


entity convo isport( clk : in std_logic; wr_data : in std_logic_vector(31 downto 0); cs : in std_logic; wr_n : in std_logic; addr : in std_logic; clr_n : in std_logic; rd : in std_logic; rd_data : out std_logic_vector(31 downto 0)); end entity; architecture behave of convo is signal c1: std_logic_vector(31 downto 0); begin process(clk,wr_n) variable rg: std_logic_vector(1 downto 0):="00"; variable c: natural; begin if (clk 'event and clk='1') then if cs ='1' and wr_n = '0' then for i in 0 to 15 loop c1(i+c)<=wr_data(i) xor rg(1); c:=c+1; c1(i+c)<=wr_data(i) xor rg(1) xor rg(0); rg(1):=rg(0); rg(0):=wr_data(i); end loop;end if;end if; end process; rd_data<=c1; end; 



My C code is  


#include <stdio.h># include "system.h"# include "altera_avalon_convo.h" int k; int main(){ printf("Hello \n"); IOWR(CONVO_0_BASE,0,0x10); k=IORD(CONVO_0_BASE,0); printf("%d\n",k); return 0; } 



the console shows : Hello 16 (16=0x10 the input !!!) 


your help is greatly appreciated
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