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刘LIU
Beginner
1,932 Views

How can I download NIOS2 image into a serial flash

Hello,

 

Here is a question about serial flash down issue by nios2-flash-programmer. ​ We designed one board with serial flash (from Micron, MT25QL128) + Cyclone10 LP (10CL025YU256) with Nios2.

 

FPGA image (sof -> jic) can be download to serial flash by QuartusII programmer correctly. I can verify this through one heartbeat LED on board.

Serial flash (128M) mem. address is from 0 to 0xff ffff.

 

Then the next step is using Nios2-flash-programmer to download fw image to this serial flash. At this stage, I have 2 questions:

  • which boot loader should be used when I generated flash image for Nios2?

With this operation, I used elf2flash --input=flash_try2.elf --output=flash_try2_epcq_controller_avl_mem.flash --boot="C:/intelfpga/17.1/nios2eds/components/altera_nios2/boot_loader_cfi.srec" --base=0x0 --end=0x1000000

the boot loader file is using boot_loader_epcs.srec. I am not sure whether this boot loader is available to our board since I didn't download image successfully to know the result. Anyway, it seams the .flash file generated.

Could you help to suggest which boot loader file should be used?

 

  • How can I download this Nios2 image to serial flash?

The command I used is: nios2-flash-programmer flash_try2_epcq_controller_avl_mem.flash --base=0x0 --device=1 --instance=0 --program --accept-bad-sysid --verbose --erase-all --epcs

(Here, xxx.flash file is generated by last step.)

after pressing "enter" key, following traces are printed:

$ nios2-flash-programmer flash_try2_epcq_controller_avl_mem.flash --base=0x0 --device=1 --instance=0 --program --accept-bad-sysid --verbose --erase-all --epcs

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Resetting and pausing target processor:

OK

Processor data bus width is 32 bits

Looking for EPCS registers at address 0x00000000 (with 32bit alignment)

 Initial values: FFFFFFF0 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF

 Not here: reserved fields are non-zero

Looking for EPCS registers at address 0x00000100 (with 32bit alignment)

 Initial values: FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF

 Not here: reserved fields are non-zero

Looking for EPCS registers at address 0x00000200 (with 32bit alignment)

 Initial values: 00000000 00000000 00000000 01010000 01010101 01010101

 Not here: reserved fields are non-zero

Looking for EPCS registers at address 0x00000300 (with 32bit alignment)

 Initial values: 00001010 00000000 01010000 01010101 00000101 01010000

 Not here: reserved fields are non-zero

Looking for EPCS registers at address 0x00000400 (with 32bit alignment)

 Initial values: 03032323 02020303 02020202 02020202 00000202 00000000

 Not here: reserved fields are non-zero

No EPCS registers found: tried looking at addresses

 0x00000000,

 0x00000100,

 0x00000200,

 0x00000300 and

 0x00000400

Leaving target processor paused.

 

I try to find some clues from your forum. And following some tips:

  1. connect debug_reset_request signal from Nios2 to serial flash controller reset signal.
  2. set serial flash related pins as regular I/O to be able to Nios2 using
  3. add one override file for flash

I really have concerns on the last tip. from forum comments, the file should be similar as:

[EPCS-xx] #128Mb

sector_size = 65536

sector_count = 256

But I couldn't know what means of EPCS-xxx, will it impact download. As mentioned above, we are using Micron flash, not EPCS/EPCQ flash. And what does xxx mean? And it's not surprised that with this override file, the download process is still failed.

Could you suggest what override file shoule be written?

And what method can we covert the .flash file into jic file, so that I can download it from QuartusII programmer?

 

Thanks for your reply in advanced.

Best regards,

Lina

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3 Replies
Nooraini_Y_Intel
Employee
140 Views

Hi,

 

Currently I am reviewing the forum for any open questions and found this thread. I apologize that no one seems to answer this question that you posted. Since it has been a while you posted this question, I'm wondering if you have found the answer? If not, please let me know, I will try to assign/find someone to assist you. Please do expect some delay in response as most of our agents are out of office due to the year-end holidays. Thank you.

 

Regards,

Nooraini

 

dsmirnov
New Contributor I
140 Views

Dear Liu,

If you currently using on-chip memory for your design, you can easily generate *.hex file from *.elf, add it to the Qsys/Platform Designer system and then as usual generate jic file

To generage hex file ou need  right-click on project, Make Targets > Build..., in the popup window Make Targets choose "mem_init_generate"

GuaBin_N_Intel
Employee
140 Views

For question "Could you help to suggest which boot loader file should be used?" , it depends on how to boot up the NIOS application. This document may help you out https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/edh_ed_handbook.pd.... To convert programming file, refer to this link https://www.intel.cn/content/altera-www/global/zh_cn/index/documentation/suc1427659050061/suc1427659...

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