Hi,I want to read data from output register of a custom designed IP (added with qsys), to be used on the C code compiled into the board. I was assuming that I perhaps could use pointers to access memory address, and fetch data directly. But is this true? Is there instead a function that does this the other way? Sorry to ask a question that may sound silly. I'm new to programming on Quartus & embedded. Thank you for your time.
Hi,Yes, you can read the registers from custom components with the help of on chip memory. You can have Avalon memory mapped interface in custom design IP so that you can access the registers. have a own logic to read and write to and from custom components with help of on chip ram. https://www.altera.com/en_us/pdfs/literature/ug/ug_ram_rom.pdf Let me know if you need any further assistance. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
Thank you for the help. Sorry to bring this back up so late - I've been busy doing other stuff for the weeks.This is what I'm trying to do right now : I'm building up the system on Qsys with Nios2 processor. I'm adding a custom IP with Avalon memory mapped master interface that outputs simple 32-bit data with write signal 32-bit address. Then, from my understanding, I can add a 'On-Chip Memory (RAM)', connect the custom IP master to On-Chip Memory's slave. Then I can access the on chip memory data (on C code) by using pointer to the 'Base' memory address (+ 32-bit address data given by custom IP master interface) ? Like, if I were to write into On-Chip Memory with data of '0x0F' and address of '0x01' through master -> slave interface, I can access the stored data by... | int *ptr = (int *) (Base address of On-Chip Memory); | data_to_read = *(ptr + 0x01); Is this how it works? Thanks in advance.
--- Quote Start --- Hi, Yes, you can read the registers from custom components with the help of on chip memory. --- Quote End --- Why would you need to add on-chip memory to do this? Why waste a precious on-chip memory resource and extra logic. All you have to do is build an Avalon-MM slave interface on your IP core. You can find an example of an Avalon-MM slave as well as Qsys TCL template here: https://electronics.stackexchange.com/a/312955/53368 Once your IP has a slave interface, you can hook it up directly to the Nios processor data master. You'll assign a base address for that connection in Qsys, and then as you say, reading the registers in C becomes a simple case of creating a pointer to that base address and dereferencing it.
I didn't mention about the custom IP having Avalon interface, so perhaps that wasn't put into consideration on the reply.Anyways, so - if I implement data read function to the custom IP verilog code and add a slave interface, I can connect it with nios2 master to fetch data directly? And again read data by something like the code below? [in Custom IP verilog] | output reg data [31:0] | output reg address [31:0] | //set values for data 32'bF, address 32'bA3; [in C] | int *ptr = (int *) (Base address of Custom IP); | data_to_read = *(ptr + 0xA3); | //data_to_read becomes 0x0F I haven't designed Avalon interface before, but I suppose I could try... +) Just to be sure, what do you mean by 'dereferencing'?
You wouldn't make the address 32 bit - doing so would prevent anything else being able to connect to the Nios data master.Instead you should make it just large enough for all the data you want (e.g. if you wanted 4x32bit words, you would have a 2-bit address). Qsys will automatically add address decoding fabric for you. Your custom IP would have an input for the address, not an output. Nios will set the address, and your IP will respond with the data. By dereferencing, indeed I do mean basically *(ptr). (https://en.wikipedia.org/wiki/dereference_operator)