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How do I access memory regions outside the RAM/ROM inside a subsystem?

LucasM
Novice
776 Views

Screenshot from 2019-02-26 18-50-02.pngScreenshot from 2019-02-26 18-16-44.pngScreenshot from 2019-02-26 18-16-42.pngI'm trying to make a shared memory region (with a mutex), but how do I access (from the HAL's perspective) a memory region outside my current subsystem?

the memory block will be located in the design top level.

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1 Solution
LucasM
Novice
295 Views
In the end, for my application the on chip ROM was insufficient so I'll use the SDRAM, also while researching how to use it, I found out about the IORW/IOWR macros, which do exactly what I want. Thanks for the reply. On Fri, Mar 1, 2019, 18:35 Intel Forums <supportreplies@intel.com wrote:

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2 Replies
JOHI
New Contributor II
295 Views

Hello,

 

If I understand your question correctly, you would like to have RAM (example) that you can access in your Nios subsystem & in your top level design.

 

There are multiple ways to do this;

One of them is to create a custom Nios component that contains a dual port RAM.

One side of the RAM can be accessed by your Nios configuration through the Avalon bus.

The other side of the RAM can be exposed by the component via an external component interface.

This interface is the link to your VHDL / Verilog code in your top level design.

 

Best Regards,

Johi

LucasM
Novice
296 Views
In the end, for my application the on chip ROM was insufficient so I'll use the SDRAM, also while researching how to use it, I found out about the IORW/IOWR macros, which do exactly what I want. Thanks for the reply. On Fri, Mar 1, 2019, 18:35 Intel Forums <supportreplies@intel.com wrote:
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