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Altera_Forum
Honored Contributor I
1,077 Views

How fast(max frequency) can Nios run on DE2-70 board

I want to try some frequency higher than 100Mhz on DE2-70. 

I built a simple system( only mcu, sysid, onchip-ram and jtag-uart) . 

But I cannot get it work with 105 ,116.6 or 120 Mhz, I even can not read the sysid. 

Is 100Mhz the fastest speed I can get?
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4 Replies
Altera_Forum
Honored Contributor I
31 Views

No, You can get even faster, but You need to add proper constraints for Your design.

Altera_Forum
Honored Contributor I
31 Views

I think someone has previously mentioned that the JTAG debug has to be run at a lower clock rate behind an appropriate bridge.

Altera_Forum
Honored Contributor I
31 Views

I'm not aware of an upper limit for the debug module but there is a minimum frequency requirement of 20MHz. 

 

Is your design meeting timing? I would expect that even without timing constraints it should have still worked assuming timing was met.
Altera_Forum
Honored Contributor I
31 Views

My design is based on DE2_70_SD_Card_Audio_Player (from Teriasic's DE2-70 CD). The jtag-uart is running at 50Mhz behined the pipeline_bridge. But I didn't take a look at other timing constraints.