How is HPS configured during boot?

[Altera_Forum]

We have previously used Cyclone devices without SoC. We are now using Arria 10. I am wondering how the HPS gets its initial configuration. In QSYS, the HPS can be configured many different ways. Where is this information stored? It seems that there must be some non-volatile memory in the HPS section for the basic HPS configuration. For instance, you can specify whether or not the HPS will have QSPI and/or SDMMC interfaces and which one to boot from. Where is this information stored? It can not be in the QSPI since the HPS would have to know that QSPI is attached in the first place. It can not be in the Serial Configuration Device for the FPGA section because the the HPS can be brought up independently of the FPGA. Can anyone shed some light?

[Altera_Forum]

The boot ROM is built into the HPS. The boot select pins (BSEL[2:0]) tell the boot ROM where to find the second-statge bootloader.

[Altera_Forum]

--- Quote Start ---  The boot ROM is built into the HPS. The boot select pins (BSEL[2:0]) tell the boot ROM where to find the second-statge bootloader.  --- Quote End ---    Thanks for responding. Is the Boot ROM in the HPS fixed, or is its code somehow modified depending on the options selected during QSYS design.

[Altera_Forum]

The boot ROM is fixed. If you haven't yet, you should read Appendix A of the HPS technical reference manual. The boot process is explained pretty clearly there. 

 https://www.altera.com/en_us/pdfs/literature/hb/arria-10/a10_5v4.pdf  Bob