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12367 Discussions

How to place my code in different sections of internal and external memory

MMinu3
Beginner
352 Views

Hi all, I'm working on the CYCLONE 10 evaluation board with both external and internal RAM enabled: when I place the whole code/data only in internal or in external memory, all works fine.

Now I need to split the time critical code/data into internal memory, while the normal code/data need to be in external RAM due its size.

Unfortunately the suggestion showed in the NIOS SW developer handbook ("advanced placement options" chapter) doesn't works.

Can someone provide me some examples?

Thanks in advance

Maurizio

0 Kudos
6 Replies
EricMunYew_C_Intel
Moderator
291 Views

Hi Maurizio,

 

May I know what was the error you got ?

 

You may need to verify if the memory section name is same as the one in your Nios II BSP or hardware.

Also, the __attribute__ must be placed in a function prototype.

 

Thanks.

 

Eric

 

 

MMinu3
Beginner
291 Views
Hi Eric, for example I tried to place an ISR function in my internal RAM (called RAM) in a section called “.myfastcode”: please refer to attached image for my memory sections in BSP. The function declaration is “void handle_timer_interrupt(void* p) __attribute__ ((section (".RAM.myfastcode")));”. When I build the project, this error appears: “section .RAM.myfastcode loaded at [000000000100d22c,000000000100d337] overlaps section .rodata loaded at [000000000100d22c,000000000100d3ab]”. Note that the overlap is in the “HRAM” address space, while I have declared my section to be in “RAM”. The same error appears even if I try to put my function in “.myfastcode” section instead of the previous “.RAM.myfastcode”. Any suggestion is welcome Thanks in advance Maurizio
EricMunYew_C_Intel
Moderator
286 Views

Hi, Maurizio


In your Platform Designer, have you checked whether there is an overlap of address range ?


Thanks.


Eric


EricMunYew_C_Intel
Moderator
277 Views

Hi, Maurizio


Is your problem resolved ?


Can you forward your linker and memory region of BSP to me ?

There could be address overlapping in address range.


Thanks.


Eric


EricMunYew_C_Intel
Moderator
266 Views

Hi, Maurizio


I didn't find any attachment. Can you forward your linker and memory region of BSP to me again by diagram or picture ?


Thanks.


Eric


EricMunYew_C_Intel
Moderator
232 Views

Hi, Maurizio


Your .myfastcode below is invalid, you need to put .rwdata, rodata or .text


“void handle_timer_interrupt(void* p) __attribute__ ((section (".RAM.myfastcode")));”


Can we close it if you have no more inquiry ?


Thanks.


Eric


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