Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12410 Discussions

How to set SMP bit and enable SCU

Honored Contributor II

I am implementing the bate metal part of an AMP (Linux + bare metal) application. 


Before enabling caches I should set the SMP bit (because there are shared memory regions) and enable the SCU. 


I can find no means in HWLIB or SOCAL to do this. The HWLIB cache.c has defines for the SMP bit and read/write functions for the ACTRL register. But all these are just static inside the c module. No access from outside. 


Currently the only way to get the system running prperly is to copy code and implement my own jw_alt_cache.c. 


I expected the HWLIB to give me access to every register I might need. Or to wrap all necessary bits. Or did I overlook something? 


0 Kudos
0 Replies