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How to use On-Chip Memory in GHRD on Atlas-SoC board

Altera_Forum
Honored Contributor II
1,302 Views

Hello! 

 

I want to transfer some data from FPGA to program that is running under Linux in HPS part. I am using DE0-Nano-SoC with 5CSEMA4U23C6 and GHRD. 

GHRD already contains On-Chip Memory in Qsys project and this memory is connected with HPS via h2f_axi_master. I was trying to store 32'hF0F0F0F0 words from within ghrd.v and then read it in Linux by opening /dev/mem but it filled with zeros since 0xC0000000 that must be the base address of the memory untill +0x8000 

 

Below is the part of ghrd.v that I was added 

adccounter addr_cnt( .clk(FPGA_CLK1_50) , .rst(~KEY) , .out(add) ); defparam addr_cnt.W = 14; soc_system_onchip_memory2_0 m( .address(add) , .byteenable(4'b1111) , .chipselect(1'b1) , .clk(FPGA_CLK1_50) , .clken(1'b1) , .reset(hps_fpga_reset_n) , .reset_req(1'b0) , .write(1'b1) , .writedata(32'hF0F0F0F0) , .readdata(datain) ); 

 

Whats wrong with such design? Why I can't get the data in HPS? 

Could anybody tell how to use this memory properly or point me to some examples? 

 

 

Thanks a lot in advance!
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6 Replies
Altera_Forum
Honored Contributor II
211 Views

Hello, did you figure it out?

Altera_Forum
Honored Contributor II
211 Views

Hello! 

 

Yes I did, but I can't remember the solution exactly. 

 

Generaly I was just reperformed each step very carefully. I also remember that it was important to regenerate C libraries after design is generated and not to forget to use these new generated libraries in your C program. 

 

I'll try to remember the details and maybe repeate this again and I'll put the steps here
Altera_Forum
Honored Contributor II
211 Views

Wow, I still stack on it. On your code example you are using Second Instance of soc_system_onchip_memory2_0, because first one is created by Qsys in GHRD project by default. So, investigated situation by the in-system memory editor I'v found, that C code with base 0xC0000000 has access to the first instance, and your code makes second instance with these bytes (hF0F0F0F0) and there is no intersections.  

I will appreciate if you can provide any examples of your code.  

I want: 

 

1. write data from HPS to RAM 

2. read it from FPGA  

 

Many thanks!
Altera_Forum
Honored Contributor II
211 Views

OK, I'll do my best to find the code. Actually I was chaged the operation system on my work station since that time and this project is somewhere in the backup file. I can't just open it and copy the code here but give a little bit of time. 

 

I also not very happy with the solution I found
Altera_Forum
Honored Contributor II
211 Views

I also remembered that I became more happy when switched to lightweight AXI

Altera_Forum
Honored Contributor II
211 Views

Many thanks for the answers. I'v got it! The idea is using Dual-port for soc_system_onchip_memory2_0, then it is available for hps and fpga. So my question is solved.

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