Hi,I am new to FPGA please help me, I am trying to write a sample application to read and write memory which is connected with nios-ii, I have developed the qsys file connections and I have dumped the .sof file in STRATIX V altera. And I tried to develop a sample program in NIOS II ide with creating a the application with SOPCINFO file. But I can't develop the BSP its failing. Whether stratix v is not supported by Nios-ii ide or is there any other problem?? My idea is to use other working code for Max 10 - DECA board. If I use the Bsp folder of that board and generate the .elf file will it be working for Stratix v board. Please help me with a solution!! Thanks in advance, Regards, prasanth
Hi,You are encouraged to duplicate the design using Stratix V, create new BSP using the generated sopcinfo file and include the C files for compilation. It should works.