I am new to the NIOS SBT. I am trying to customize the NIOS II Simple socket server design template to read the data from the files and write it to the SDRAM. I need help in the addressing the SDRAM. I have created a region in the linker script section of the BSP editor. But I feel that the offset addressing is not happening properly. Should we need to change any reset vector option present in the NIOS CPU IP?
Thank you for posting in Intel community forum and hope you are doing well, regards to the question that you have on the memory address in the bsp setting, the reset vector seem correct, and if you are suspecting the address are in correct, you may refer to the steps to modify those address in the bsp setting in the section (184.108.40.206). More details of the linker memory can also be found here.
Just curious, what are the targeted device that you are working on?
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