Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12470 Discussions

How would one put the FPGA HW + Nios II SW image together on the following memories

Altera_Forum
Honored Contributor II
881 Views

When it comes to external memories to store configuration data, we have the following options: 

1. EPCS. 

2. EPCQ. 

3. CFI Flash. 

4. Quad SPI. 

5. NAND Flash. 

 

If I have a design containing NIOS, how would I put the HW (that comes from .sof) + SW (that comes from .elf) images into a single image to program any of these flash memories? What steps are needed? Are the steps the same for them?
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
108 Views

For EPCS, you would use the EPCS Serial Flash Controller Core IP block and use a JIC programming file. 

 

For the parallel and SPI flash, I believe you are looking at multiple images needed.
Altera_Forum
Honored Contributor II
108 Views

Hi, 

 

i do create my epcs images using the following commands from the Nios Command Shell: 

sof2flash --epcs --compress --input=hw.sof --output=hw.flash elf2flash --epcs --after=hw.flash --input=sw.elf --output=sw.flash  

Now i do have 2 flash files which are combined via: 

cat hw.flash sw.flash > image.flash  

And converted to epcs binary 

nios2-elf-objcopy -I srec -O binary image.flash image.bin  

 

Now your image.bin can be wriiten directly to address 0 of your epcs, or to another address if you use the Remote_Config IP. 

 

I do not have any experience concerning the other Flash types, but think there's an equal approach.
Reply