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LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
ENTITY signed_mult18 is
PORT( a : IN SIGNED (17 DOWNTO 0);
b : IN SIGNED (17 DOWNTO 0);
result : OUT SIGNED (35 DOWNTO 0));
END ENTITY;
ARCHITECTURE rtl OF signed_mult18 IS
BEGIN
result <= a * b;
END rtl;
I need a testbench to tell him the code he can read from the file.
This multiplier should know the date and year of birth in the supplementary code from the file.
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Test the 18x18 multiplier created by the translators for sign numbers (numbers
expressed in the supplementary code) and verify the created multiplier by:
a) Numbers A = -RRRR and B = DDMM, where YYYY, MM, DD are the year, month and day of your birth.
b) using another 10 suitably selected sufficiently large input values A, B,
each of which has at least one unit and one zero in the four most significant bits
half of the numbers tested are negative. Entry values must be entered as input
the text file and the accuracy of the results must be automatically verified using testbench
file.
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hi,
Here in community, no one will provide complete code so user should come with their own code/logic & people in community may help to make it correct/better appropriate.
In this case, I would like to suggest you need to use the STD.textio package that defines routines for reading and writing to
a text file , refer the below old thread ,
https://forums.intel.com/s/question/0D50P00003yyR8zSAE/vhdl-textio-hread-problem
Let me know if this has helped resolve the issue you are facing or if you need any further assistance.
Best Regards
Vikas Jathar
(This message was posted on behalf of Intel Corporation)
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