Hello:Now I have some problems about the I/O Marco IORD_XDIRECT AND IOWR_XDIRECT.For example: I have a 16 bits slave periphery and the BEn0 ,BEn1 are both always low(means that the upper 8 bits and the lower 8 bits are both used).Make sure the front point no problem,now I use the sentense IOWR_8DIRECT (base,odd_addr,data8),the result I think is that the upper 8 bits is the data8,the lower 8 bits is xxxxxxxx.If using even address,the result is opposit.But I am not sure it is right or wrong?
I look up "io.h" which define the "IORD/IOWR", and then "stb / stbio, lbu/lbuio....." in the Instruction Set Reference of NIOSII. I can't understand the specification about those instructions.Can someone help us to explain what they work out detailly?
Look at Table 3.5 of the Processor Reference Handbook<div class='quotetop'>QUOTE </div> --- Quote Start --- ldbio ldbuio stbio ldhio ldhuio sthio These operations load/store byte and half-word data from/to peripherals without caching or buffering.[/b] --- Quote End ---
Hi mountain8848,The stb and stbio are used to store a byte (from memory). The stbio instruction bypasses the data cache, the stb does not. The ldbu and ldbuio are used to load a byte (from memory). The lduio instruction bypassess the data cache, the ldbu does not. The "u" just means that the high-order bits in the target register are set to zero (unsigned) rather than being sign-extended. Regards, --Scott