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Altera_Forum
Honored Contributor I
1,598 Views

IORD and IOWR issues

Hello there, 

 

I am struggling to understand a simple write and read with the nios processor. 

 

With qsys, I have setup a simple testcase where a nios (e) with no cache and a PIO are connected. PIO is connected to the external LEDs. 

With the DE0NAN0 board, I can easily see the LEDs to change to what value I have put on the eclipse program. 

e.g IOWR(PIO_BASE,0,0xA); 

 

Then, I manually changed the qsys generated pio.led such that 

 

data_out <= {writedata[5:0],1'b1}; 

instead of  

the original data_out <= writedata[5:0]; 

 

and ensured that the qsys does not generate the nios and pio again during the compilation. 

 

Afterwards, with eclipse program, I do a 

IOWR(PIO_BASE,0,0xA); 

printf("%X ",IORD(PIO_BASE,0)); 

 

I was expecting that "10101" in binary from a IOWR of 0xA. 

However, it reads "0xA". 

 

Can anyone please shed some light what I am doing wrong here ?
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5 Replies
Altera_Forum
Honored Contributor I
71 Views

If data_out has the original 6bit data width, you should write 

data_out <= {writedata[4:0],1'b1}; 

otherwise I think the compiler discards the added bit.
Altera_Forum
Honored Contributor I
71 Views

Nice catch. however it was just a typo I made when writing that post 

 

the original version from qsys was 

data_out <= writedata[6:0];
Altera_Forum
Honored Contributor I
71 Views

 

--- Quote Start ---  

 

Afterwards, with eclipse program, I do a 

IOWR(PIO_BASE,0,0xA); 

printf("%X ",IORD(PIO_BASE,0)); 

 

I was expecting that "10101" in binary from a IOWR of 0xA. 

However, it reads "0xA". 

 

--- Quote End ---  

 

Make sure Nios doesn't perform a cache access instead of the actual IORD access. 

Flush the cache between the two instructions or force IORD to be uncached by setting address bit 31.
Altera_Forum
Honored Contributor I
71 Views

I have  

- verified the logic on the technology map 

- set address bit 31 as you recommended 

- on system.h, NIOS2_DCACHE_SIZE and NIOS2_ICACHE_SIZE = 0 

 

still I dont have the expected "10101" in binary from a IOWR of 0xA. 

 

HW: data_out <= {writedata[5:0],1'b1}; 

 

Observed behaviour on both the LEDs and with IORD suggest that the implementation is 

data_out <= writedata[6:0]; 

 

Do you have any other idea how to debug that ?
Altera_Forum
Honored Contributor I
71 Views

I would recommend you then to verify if the correct .sof file is being uploaded.

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