Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

IOWR_XXDIRECT latency

Altera_Forum
Honored Contributor II
815 Views

Hi all! 

 

I'm experiencing some strange latency when using IOWR macros. I've added added custom 8-bit slave to QSYS and got huge number of cycles to read/write its registers. I thought that this issue related to some mistakes in my peripherial but then I've tried to read on-chip memory and got the same result! 

 

Here is the code, I'm using performance counter: 

 

int main() { PERF_RESET(PERFORMANCE_COUNTER_0_BASE); PERF_START_MEASURING(PERFORMANCE_COUNTER_0_BASE); PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE,1); IORD_8DIRECT(ONCHIP_MEMORY2_0_BASE, PRER_LO); PERF_END(PERFORMANCE_COUNTER_0_BASE,1); PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE,2); IORD_16DIRECT(ONCHIP_MEMORY2_0_BASE, PRER_LO); PERF_END(PERFORMANCE_COUNTER_0_BASE,2); PERF_BEGIN(PERFORMANCE_COUNTER_0_BASE,3); IORD_32DIRECT(ONCHIP_MEMORY2_0_BASE, PRER_LO); PERF_END(PERFORMANCE_COUNTER_0_BASE,3); perf_print_formatted_report(PERFORMANCE_COUNTER_0_BASE,50000000,3,"IORD_8","IORD_16","IORD32"); return 0; } 

 

And what I get: 

 

http://www.alteraforum.com/forum/attachment.php?attachmentid=10849&stc=1  

 

Ok, timer adds some time to this, as I measured, 30 clock cycles. So we have about 20 clock cycles per word, still bad. What could I do wrong? 

I'm using Quartus 15.0 Web Edition and Nios 2 Gen 2 /e.
0 Kudos
0 Replies
Reply