Igh EtherCAT master porting for Linux OS on CyconeV SoC

[Altera_Forum]

Hi, 

 Does anyone could run well the Igh EtherCAT master for linux-RT of Cyclone V ?  I got the linux-socfpga.git for downloading Linux-3.10-ltsi-rt. I already put the EtherCAT module and application on the Linux-RT Helio board for Cyclone V. It could run well as communication cycle as 10 ms.  And the Ethernet port will block when I use 1ms transmit rate. It seems that the delay of ethernet transmit/receive function is too long.  Has anyone also verify the situation or anyone could point out the delay issue?

[Altera_Forum]

--- Quote Start ---  Hi,  Does anyone could run well the Igh EtherCAT master for linux-RT of Cyclone V ?  I got the linux-socfpga.git for downloading Linux-3.10-ltsi-rt. I already put the EtherCAT module and application on the Linux-RT Helio board for Cyclone V. It could run well as communication cycle as 10 ms.  And the Ethernet port will block when I use 1ms transmit rate. It seems that the delay of ethernet transmit/receive function is too long.  Has anyone also verify the situation or anyone could point out the delay issue?  --- Quote End ---      Hi, Were you able to successfully use the TSE IP core for Ethercat master? How is the performance?