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Implementing Interrupt Vector Custom Instruction in Qsys

Altera_Forum
Honored Contributor II
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Is there a possibility to implement the outdated Interrupt Vector Custom Instruction or any other performant Hardware Interrupt Handler in Qsys? 

We are using MicroC/OS-II running on a Nios II system. Therefore VIC-IP is not usable because MicroC/OS-II doesn't support Shadow Register Set. We have tried to use VIC-IP but the system was crashing (confirmation of Solution ID: rd02162014_886).
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Altera_Forum
Honored Contributor II
361 Views

Have you tried the Interrupt Vector Custom Instruction?

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Altera_Forum
Honored Contributor II
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No. It was not possible, because this Custom Instruction was supported until Quartus 13 in SOPC-Builder. My project was launched with Quartus 14 and Qsys. 

In fact it is possible to convert the Custom Instruction from SOPC to Qsys, but it was too time-consuming to bring the project back to Quartus 13. My project was too far advanced to do this respectively the use of Interrupt Vector CI was too less important for us. 

In the meantime we changed over to openRTOS operating system because of several reasons. OpenRTOS supports Shadow-Register-Set and the VIC-IP_Core. Thus we use the VIC now.
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