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Altera_Forum
Honored Contributor I
2,705 Views

Intel HLS example reports

Hello, 

 

I am new to the concept of HLS. I am using Intel HLS and going to start with the examples that come with the installation of Quartus prime edition. 

 

Can anyone of you share the successful project report files generated after testing any of those examples ? The examples are Counter, image_downsample,interp_decim_filter,QRD and YUV2RGB. Anyone who has tried with one of these examples, it would be great if you can attach the project files post synthesis in this thread .... 

 

Will be thankful
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27 Replies
Altera_Forum
Honored Contributor I
195 Views

Hi, 

 

I have used Linux and Quartus 17.1 pro. 

Attached the report files of interp_decim_filter for reference. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
195 Views

Hi, 

 

For steps and complete project folders and files check the link. 

https://drive.google.com/file/d/1jx-ulfgpmkt7r2uycnpiimell6ybudwr/view?usp=sharing 

 

Command prompt  

C:\intelFPGA_pro\17.1\hls>init_hls.bat Assuming current directory (C:\intelFPGA_pro\17.1\hls\) is root of i++ Will use C:\intelFPGA_pro\17.1\hls\..\quartus to find Quartus for internal i++ use INFO: Could not find files for the given pattern(s). Will be using Modelsim at C:\intelFPGA\17.0\modelsim_ase\win32aloem Will be using Modelsim at C:\intelFPGA\17.0\modelsim_ae\win32aloem Setting environment for using Microsoft Visual Studio 2010 x64 tools. Adding C:\intelFPGA_pro\17.1\hls\bin to PATH Adding C:\intelFPGA_pro\17.1\hls\host\windows64\bin to PATH C:\intelFPGA_pro\17.1\hls>cd C:\Users\anandr1x\Downloads\counter C:\Users\anandr1x\Downloads\counter>make test-x-86-64 'make' is not recognized as an internal or external command, operable program or batch file. C:\Users\anandr1x\Downloads\counter>build.bat test -x86-64 Usage: build.bat Targets: test-msvc, test-x86-64, test-fpga, clean Example: build.bat test-x86-64 C:\Users\anandr1x\Downloads\counter>build.bat test - x86 - 64 Usage: build.bat Targets: test-msvc, test-x86-64, test-fpga, clean Example: build.bat test-x86-64 C:\Users\anandr1x\Downloads\counter>build.bat test -x86-64 Usage: build.bat Targets: test-msvc, test-x86-64, test-fpga, clean Example: build.bat test-x86-64 C:\Users\anandr1x\Downloads\counter>build.bat test-x86-64 i++ -march=x86-64 counter.cpp -o test-x86-64.exe Run test-x86-64.exe to execute the test. C:\Users\anandr1x\Downloads\counter>build.bat test-fpga i++ -march=Arria10 counter.cpp -o test-fpga.exe test-fpga.exe : warning LNK4088: image being generated due to /FORCE option; image may not run Run test-fpga.exe to execute the test. C:\Users\anandr1x\Downloads\counter> 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
195 Views

thanks Anand..... 

 

regarding the HLS concept specifically in Intel HLS compiler, what is real purpose of keyword ´component´? Is it the top level function ?
Altera_Forum
Honored Contributor I
195 Views

Hi, 

 

Yes, 

To identify a function in your C++ application that you want to synthesize. 

Insert the component keyword in the source code before the top-level C++function to be synthesized. 

Refer page 7 of the link 

https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/hls/ug-hls.pdf 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
195 Views

thanks ! one question... 

 

just for a very simple experiment, can I synthesize only component if I dont have the test bench ? I am trying to check the a very simple code but i don´t have its test bench...
Altera_Forum
Honored Contributor I
195 Views

? please reply

Altera_Forum
Honored Contributor I
195 Views

Hi, 

 

Apologies for the delay. 

 

Yes, We can synthesize with no test bench.  

You will have no way of knowing if your component is correct, we do not recommend such informal procedure that may lead to unpredictable issues in the future. 

Is not about testing of tool capability now.  

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
195 Views

Dear Anand 

thanks for the reply..... I am trying to compile a very simple C++ algorithm. The din_t I am taking as ac_int<16> and d_out I am taking as ap_int<48>....The length of vector as N=10... I have compiled it in another HLS tool.... I will be grateful if you can check if I am following the right difrection towards synthesis in Intel HLS..... In my code there is a component and below i have the test bench under int main(void)....This test bench works in other HLS tool.... I am having problem in Intel HLS with this...Can you figure out what is wrong in it ? Will be really thankful... 

 

# include "HLS/hls.h" 

# include <stdio.h> 

# include "HLS/ac_int.h" 

# include "HLS/ac_fixed.h" 

 

# include "HLS/math.h" 

 

 

using namespace ihc; 

 

component void sol (din_t a[N], din_t b[N], dout_t *dout) 

int i; 

int acc= 0; 

int a_reg, b_reg, sub, sub2; 

 

for(i=0; i<N; i++) 

# pragma HLS PIPELINE II=1 

 

a_reg = a

b_reg = b

sub = a_reg - b_reg; 

sub2 = sub*sub; 

acc += sub2; 

 

*dout = acc; 

 

 

 

int main(void) 

int i, k, cnt; 

int ret_val = 0; 

 

int a[N], b[N]; 

din_t aa[N], bb[N]; 

 

long long int ref_res; 

dout_t res; 

 

cnt = 0; 

for (k=0; k<10; k++) 

//create random data 

for(i=0; i<N; i++) 

a = rand() % (1024*16); 

b = rand() % (1024*16); 

aa = (din_t) a

bb = (din_t) b

 

//call reference function 

ref_sol(a, b, &ref_res); 

 

//call design Under Test 

sol( aa, bb, &res); 

 

//check results 

printf("got %lld expected %lld\n", (long long int) res.to_double(), (long long int) ref_res); 

if ( (ref_res - (long long int) res) !=0 ) cnt++; 

 

if (cnt>0) 

printf("TEST FAILED: %d errors\n", cnt); 

ret_val = 1; 

else 

printf("TEST SUCCESS!\n"); 

ret_val = 0; 

 

 

return ret_val; 

 

}
Altera_Forum
Honored Contributor I
195 Views

Hi, 

 

Can you attach the error message with complete steps followed? 

For both the HLS compliers. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
195 Views

Dear Anand, 

 

thanks for the reply. The other HLS tool is Vivado HLS and it is showing no error and test bench runs fine in that tool. I converted the code in Intel HLS format while using ac data types.  

My request to you is if you have a intel HLS compiler in your machine, can you run the above code and check if test bench passes or not.... I will be really grateful.
Altera_Forum
Honored Contributor I
195 Views

dear Anand, 

 

waiting for your helpful reply... thanks
Altera_Forum
Honored Contributor I
195 Views

Hi, 

 

1.What for the below lines are used and where is the function? 

 

--- Quote Start ---  

//call reference function 

ref_sol(a, b, &ref_res); 

--- Quote End ---  

 

2.How "check results" session of code works? 

 

With few modification I have compiled the code. 

 

#include "HLS/hls.h" # include <stdio.h> # include "HLS/ac_int.h" # include "HLS/ac_fixed.h" # include "HLS/extendedmath.h" # include "HLS/math.h" using namespace ihc; component void sol (int a, int b, int *dout) { int i; int acc= 0; int a_reg, b_reg, sub, sub2; //int N=10; for(i=0; i<sizeof(a); i++) { # pragma HLS PIPELINE II=1 a_reg = a; b_reg = b; sub = a_reg - b_reg; sub2 = sub*sub; acc += sub2; } *dout = acc; } int main(void) { int i, k, cnt; int ret_val = 0; int N=10; int a, b; int aa, bb; long long int ref_res; int res; cnt = 0; //create random data for(i=0; i<N; i++) { a = rand() % (1024*16); b = rand() % (1024*16); aa = (int) a; bb = (int) b; } //call design Under Test sol( aa, bb, &res); return ret_val; } 

VisualStudio's link.exe is not on the path. Guessing its location. VS100COMNTOOLS environment variable is set to c:\Program Files (x86)\Microsoft Visual Studio 10.0\Common7\Tools\. Looks like you have VisualStudio2010 installed. Using it. Setting environment for using Microsoft Visual Studio 2010 x64 tools. Adding c:\intelFPGA_pro\17.1\hls\bin to PATH Adding c:\intelFPGA_pro\17.1\hls\host\windows64\bin to PATH c:\intelFPGA_pro\17.1\hls>cd c:\Users\anandr1x\Desktop\hls\u The system cannot find the path specified. c:\intelFPGA_pro\17.1\hls>cd c:\Users\anandr1x\Desktop\hls\userhls c:\Users\x\Desktop\hls\userhls>build.bat test-x86-64 i++ -march=x86-64 sol.cpp -o test-x86-64.exe sol.cpp:17:18: warning: sizeof on array function parameter will return size of 'int *' instead of 'int ' for(i=0; i<sizeof(a); i++) ^ sol.cpp:11:25: note: declared here component void sol (int a, int b, int *dout) ^ 1 warning generated. Run test-x86-64.exe to execute the test. c:\Users\x\Desktop\hls\userhls>build.bat test-fpga i++ -march=Arria10 sol.cpp -o test-fpga.exe sol.cpp:17:18: warning: sizeof on array function parameter will return size of 'int *' instead of 'int ' for(i=0; i<sizeof(a); i++) ^ sol.cpp:11:25: note: declared here component void sol (int a, int b, int *dout) ^ 1 warning generated. sol.cpp:17:18: warning: sizeof on array function parameter will return size of 'int *' instead of 'int ' for(i=0; i<sizeof(a); i++) ^ sol.cpp:11:25: note: declared here component void sol (int a, int b, int *dout) ^ 1 warning generated. Error: Cannot remove ./test-fpga.prj: Can't remove file ./test-fpga.prj/quartus: Permission denied Run test-fpga.exe to execute the test. 

 

 

let me know if this has helped resolve the issue you are facing or if you need any further assistance. 

please open a new thread if question does not matches with the thread title 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
195 Views

Dear Anand, 

 

thanks for your reply....sorry for the confusion and messing things up....I have posted three codes below under headings SOURCE file, HEADER and TEST BENCH. This will definitely give you the whole idea. 

Regarding your question ".What for the below lines are used and where is the function? " please check the third code under TEST BENCH. 

 

Regarding your question "How check results session of code works?" also please check the third code under TEST BENCH. 

 

 

SOURCE file 

# include "../src/diff_sq_acc.h" 

 

void diff_sq_acc(din_t a[N], din_t b[N], dout_t *dout) 

 

 

unsigned char i; 

float acc= 0; 

float a_reg, b_reg, sub, sub2; 

 

diff_sq_acc_label0:for(i=0; i<N; i++) 

 

 

a_reg = a

b_reg = b

sub = a_reg - b_reg; 

sub2 = sub*sub; 

acc += sub2; 

 

*dout = acc; 

 

 

HEADER 

# ifndef H_SQRT_ACC_H# define H_SQRT_ACC_H 

 

# include <stdlib.h># include "ap_int.h" 

 

typedef float din_t; 

typedef float dout_t; 

# define N 100 

 

void diff_sq_acc(din_t a[N], din_t b[N], dout_t *dout); 

# endif //#ifndef H_SQRT_ACC_H 

 

 

 

TEST BENCH  

# include <stdio.h># include "../src/diff_sq_acc.h" 

 

 

 

void ref_diff_sq_acc(int a[N], int b[N], long long int *dout) 

int i; 

long long int acc = 0; 

int diff; 

long long int diff2; 

 

for(i=0; i<N; i++) 

diff = a-b

diff2 = (long long int) diff * (long long int) diff; 

acc += diff2; 

 

*dout = acc; 

 

 

int main(void) 

int i, k, cnt; 

int ret_val = 0; 

 

int a[N], b[N]; 

din_t aa[N], bb[N]; 

 

long long int ref_res; 

dout_t res; 

 

cnt = 0; 

for (k=0; k<10; k++) 

//create random data 

for(i=0; i<N; i++) 

a = rand() % (1024*16); 

b = rand() % (1024*16); 

aa = (din_t) a

bb = (din_t) b

 

//call reference function 

ref_diff_sq_acc(a, b, &ref_res); 

 

//call design Under Test 

diff_sq_acc( aa, bb, &res); 

 

//check results 

printf("got %lld expected %lld\n", (long long int) res.to_double(), (long long int) ref_res); 

if ( (ref_res - (long long int) res) !=0 ) cnt++; 

 

if (cnt>0) 

printf("TEST FAILED: %d errors\n", cnt); 

ret_val = 1; 

else 

printf("TEST SUCCESS!\n"); 

ret_val = 0; 

 

 

return ret_val; 

 

}
Altera_Forum
Honored Contributor I
195 Views

Dear Anand, 

 

Can you please attach your whole code with the executable and reports in this thread ? That would be really helpful....
Altera_Forum
Honored Contributor I
195 Views

Hi, 

 

Refer the below link 

https://drive.google.com/open?id=1bai8bhwpl3rzytqjqkhcdmiecf5ftrju 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation
Altera_Forum
Honored Contributor I
195 Views

Dear Anand, 

 

thanks for the reply....And if I have to use your code for float and fixed data type inputs then ? Basically just to compare the results for fixed and float inputs....in first case if i use it for fixed data input and in second case if I use for float input ? Can you please help me with these two data types in the same code.... ?
Altera_Forum
Honored Contributor I
195 Views

And one more question..... 

 

If I use the data type float in the same code, please recommend me what should be the exact representation of ac_fixed <W,I> in terms of W and I if I want to use the exact code for fixed data type and later compare the results of float and fixed data type. Waiting for your valuable reply....so far you have been a great help.
Altera_Forum
Honored Contributor I
195 Views

Dear Anand 

 

While going through AC data types used by Intel HLS, I have written the same code in terms of ac_fixed data types below. I will be really grateful if you can run and synthesize at your end. Thanks in advance......you have been so far very helpful.....  

 

 

 

 

void diff_sq_acc( ac_ufixed<11,1> a[N], ac_ufixed<11,1> b[N], ac_ufixed<28,8> *dout) 

 

unsigned char i; 

ac_ufixed<28,8> acc= 0; 

ac_ufixed<11,1> a_reg, b_reg; 

 

ac_fixed<12,2> sub; 

 

ac_ufixed<21,1> sub2 ; 

 

 

 

for(i=0; i<N; i++) 

# pragma HLS PIPELINE II=1 

 

a_reg = a

b_reg = b

sub = a_reg - b_reg; 

sub2 = sub*sub; 

acc += sub2; 

 

*dout = acc; 

}
Altera_Forum
Honored Contributor I
195 Views

Dear Anand, 

 

as always waiting for your valuable reply and help.... thanks
Altera_Forum
Honored Contributor I
36 Views

Hi, 

 

1.To get the difference between float and fixed data type you can use the tutorials the installation directory. 

"..\intelFPGA_pro\17.1\hls\examples\tutorials" 

 

2.Create simple project like multiplication to understand the difference.  

#include "HLS/hls.h"# include <stdio.h># include "HLS/ac_int.h"# include "HLS/ac_fixed.h"# include "HLS/extendedmath.h"# include "HLS/math.h" typedef ac_int<8, false> fixed_8_t; typedef ac_int<16, false> fixed_16_t;# define N 2 component void dut(fixed_8_t a, fixed_8_t b, fixed_8_t *dout) { unsigned int i; fixed_16_t acc= 0; fixed_8_t a_reg, b_reg, sub; fixed_16_t sub2; for(i=0; i<N; i++) { a_reg = a; b_reg = b; sub = a_reg - b_reg; sub2 = sub*sub; acc += sub2; } *dout = acc; } int main() { fixed_8_t z; fixed_16_t ip = &z; fixed_8_t x={128,128}; fixed_8_t y={128,128}; dut(x,y,&z); printf("%d \n",*ip); getchar(); return 0; }  

3.What is the error you are getting from your code, can screenshot and post it? 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
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