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Altera_Forum
Honored Contributor I
1,145 Views

JTag programming

Hi, 

 

We are currently using the USB Blaster and Quartus software to download the FPGA code to Max 10 Nios board. 

In the next phase the Nios board would be connected via Jtag cable to another linux board so I need to figure out how to write the code to download the FPGA code (in a file) from the linux board using the generic Jtag ports instead of the USb blaster. 

Has anyone done this and can help me with the steps involved? 

Not having any experience of Jtag I'm not sure if the following sequence is correct: 

 

1. Figure out a way to convert the .sof (really should be the .pof for permanent storage) to binary and transfer the whole binary image down assuming we can do this via Jtag 

2. Write linux C to perform the Jtag download operation. 

 

Anybody that has done this with a working example and can show the exact steps required? 

Much Appreciated!
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4 Replies
Altera_Forum
Honored Contributor I
47 Views

It isn't clear from your posting if you want to program an FPGA on the linux board with the Max 10 FPGA or if you want to program the Max 10 from a linux distro.  

 

I'm not sure if this applies, but remember that the Max 10 is a CPLD. It stores the configuration so it doesn't need to be configured at powerup.  

 

If you want to configure an FPGA on another board from the Max 10 using JTAG, I'd advise against doing that. It's vastly easier to include a configuration flash on your other board and program it from Quartus with a USB blaster. See the Altera documentation (E.g. ch 7 JTAG configuration in the Cyclone V handbook and app note 414 on the Jrunner driver) if you insist on doing it the with JTAG.
Altera_Forum
Honored Contributor I
47 Views

Hi, 

Thanks for the reply. 

Currently the USB blaster is connected to the Max 10 board to do the FPGA code download. Instead we'd like to connect the max 10 board and Linux board with generic jtag connectors on both end and write a small program on the Linux board to download the fpga via jtag. I read somewhere the way to do this is to use the jam player Altera uses. First to produce the jam file and then customize the jam player stub to our application. One thing I wasn't clear was the mention of intel hex file which seems necessary if we want the fpga code to stay on permanently? Would the jam player still be used to send the intel hex or something else would be needed? 

 

thanks!
Altera_Forum
Honored Contributor I
47 Views

I would recommend adding configuration flash to the FPGA board. You will save a lot of engineering time doing this rather than trying to implement jam player. I've never used jam player myself, so I don't feel qualified to say anything about it. I was on a team a few years back that couldn't get jam to work and ended up using another configuration strategy (I don't remember which one was decided).

Altera_Forum
Honored Contributor I
47 Views

If you don't want to use a configuration device it is also possible to send to configuration to the FPGA from the linux system using passive serial. It's a lot easier than JTAG and more documented. I've never used the jam player myself but from what I've heard it's not easy to get it to work...

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