I am looking for HPS to FPGA custom component integrations guideline using Qsys. I am new to SoC FPGA programming. I still could not found a material or tutorial for HPS to custom VHDL or Verilog component integration. I need to get to know what are the connections that I should make and how to/ where to declare them in C code on ARM processor and the entity of the FPGA custom designed component. Can any body post some links.I have read following tutorials. Avalon Interface Specifications pdf ARM_A9_intro_intelfpga pdf Intel_FPGA_Monitor_Program_ARM pdf making qsys component pdf Using_GIC - ARM HPS pdf External_Bus_to_Avalon_Bridge -nios II pdf Avalon_to_External_Bus_Bridge nios II pdf DE0-Nano-SoC_Computer_ARM pdf
I am also looking for interfacing custom component to HPS. Did you manage to find out the solutions? If yes, I request you to provide the links for the documents.Thank you.
The custom component is quite easy. Did you try to create a custom component and send/receive data with it using NIOS? It should be similar but with small modifications.
Thank you for your reply. I have not tried using NIOS. But I have seen some documents describing the same. Could you please share a document which gives detailed step by step instruction? I have gone through the tutorials on Altera and Rocketboards. These tutorials/workshops use ready made templates. These do not explain every step. I am looking for a document/tutorial/link which gives step by step for every setting.Thank you. Regards
You should try thisftp://ftp.altera.com/up/pub/altera_material/15.1/tutorials/making_qsys_components.pdf I also suggest you start with nios (using eclpise) to communicate with your new custom component.
Thank you for sharing the document. I have already used that tutorial. In that tutorial Avalon memory map is used. In my system I am using ARM processor instead of NIOS. I am not sure whether I can interface my custom peripheral using Avalon memory map in the case ARM. I have come across posts saying interconnect bridges can solve this. But didn't find a document on that.
--- Quote Start --- Thank you for sharing the document. I have already used that tutorial. In that tutorial Avalon memory map is used. In my system I am using ARM processor instead of NIOS. I am not sure whether I can interface my custom peripheral using Avalon memory map in the case ARM. I have come across posts saying interconnect bridges can solve this. But didn't find a document on that. --- Quote End --- Yes the QSYS will connect the peripherals correctly, both AXI and Avalon. I already tried it and it works. On ARM C coding, you will need a pointer that targets the address of that custom peripheral (with lightweight offset. Check the tutorials). Did you try to use the ARM with gpio or any pre-built peripheral from the QSYS tool?
Thanks for your reply!I am going through training courses provided at Altera website (https://www.altera.com/support/training/catalog.html?coursetype=online&language=english&keywords=arm). Hopefully these courses contain information about HPS system creation and using it in DS-5 tool. Yet I am not successful in using ARM system with a peripheral. While saying about C coding and pointer, you referred to check tutorials. Could you please let me know their location?
Check the following tutorialhttps://www.altera.com/support/support-resources/design-examples/soc/fpga-to-hps-bridges-design-exam... and the following page https://www.altera.com/support/support-resources/design-examples.html It was not easy for me to start using the ARM HPS. I spent hours trying to understand how to program it and the tutorials which I gave you its links were not very good but may help you. They are not really tutorials but example projects with the codes. But I already have experience with NIOS which help a lot start using the HPS. I also have better experience using Xilinx Zynq. This also helped me.
Thank you sir for the tutorial and link. I have experience in dealing with Xilinx Zynq and other boards. Use of Arria V SoC kit is my first encounter with Altera devices. I feel my inexperience with Altera devices and the Altera SoC design flow, which is altogether different from the flow I followed for Xilinx devices, are complicating my learning.I have been through many tutorials, videos and links of Altera SoC designs. Altera has compiled many good examples and projects at Altera training and Rocketboards websites. Personally for a beginner like me these are advanced in nature. I will follow the material you have provided and will share my experience.