Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
12455 Discussions

[MAX-10] NIOS-II -> what FPGA resources will be taken

Altera_Forum
Honored Contributor II
1,422 Views

Hi All, 

 

I'm considering to use NIOS-II in the MAX-II device for arithmetic calculations.  

 

As far as I understand, there are several configurations for NIOS-II (economic, fast, etc).  

 

How can I know how many resources (Logic Elements, Memory Blocks, etc) each configuration requires?  

 

What's maximum size of Memory (RAM) might be attached to NIOS-II? Can it use an external DDR Memory?  

 

Actually I don't need any RTOS on the NIOS-II, just bare metal code will be ran there...  

 

Thank you!
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
212 Views

Chapter 5 of the "nios ii gen2 processor reference guide (https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/nios2/n2cpu-nii5v1gen2...)" gives some guidelines on expected resource utilisation. 

 

Yes, you can host DDR memory from a MAX 10 device. Have a read of an-730 (https://www.altera.com/en_us/pdfs/literature/an/an730.pdf). It discusses it in detail. 

 

Cheers, 

Alex
Reply