Re: MPU problems

Altera_Forum · ‎01-21-2011

I'm running Quartus 10.0 SP1 and have a system that is comprised of 1MB of off-board SRAM memory, 32MB of off-board FLASH (unused), and 196kbytes of on-chip memory. Further, I have several peripheral devices defined using SOPC builder... including a NIOS II/f with the MPU enabled. I have MPU limits enabled. Instruction regions are defined w/64kbyte boundaries and 8 total regions. Data regions are defined w/16kbyte boundaries and 8 total regions. I've read AN540 and used the example code as a basis to define regions in my application.

At the beginning of my main() function, I execute the data & instruction region configuration initialization and then enable the MPU via nios2_mpu_enable(). It's at this point that operation fails. The failure exhibits itself simply as the system hanging. When I hit the Suspend button in NIOS II Debug, the debugger comes up with alt_irq_entry(), but I am unable to step through it. Worse, sometimes I don't even see that and I get:

"assertion "m_state == STATE_RUNNING || m_state == STATE_HUNG || (m_state == STATE_DEBUG && with_reset)" failed: file "nios2debug.cpp", line 297".

Not very helpful to say the least.

Tracing into the enable function, I reach nios2_write_config() where it performs a NIOS2_WRITE_CONFIG(bstatus). It's at this point that I have troubles.

I've tried to configure the MPU so that everything is wide open -- all data is available for R/W access and all instruction regions are available for execution. No difference. Added to that I've tried to mark everything as uncached. No difference.

Any ideas on the proper method to troubleshoot this or what the problem might be? I never did build the example project in AN540, but I've used MMUs before (which are a bit more complicated than MPUs) and haven't run into problems like this before.

Thanks,

--tim

Altera_Forum · ‎04-09-2013

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I'm running Quartus 10.0 SP1 and have a system that is comprised of 1MB of off-board SRAM memory, 32MB of off-board FLASH (unused), and 196kbytes of on-chip memory. Further, I have several peripheral devices defined using SOPC builder... including a NIOS II/f with the MPU enabled. I have MPU limits enabled. Instruction regions are defined w/64kbyte boundaries and 8 total regions. Data regions are defined w/16kbyte boundaries and 8 total regions. I've read AN540 and used the example code as a basis to define regions in my application.

At the beginning of my main() function, I execute the data & instruction region configuration initialization and then enable the MPU via nios2_mpu_enable(). It's at this point that operation fails. The failure exhibits itself simply as the system hanging. When I hit the Suspend button in NIOS II Debug, the debugger comes up with alt_irq_entry(), but I am unable to step through it. Worse, sometimes I don't even see that and I get:

"assertion "m_state == STATE_RUNNING || m_state == STATE_HUNG || (m_state == STATE_DEBUG && with_reset)" failed: file "nios2debug.cpp", line 297".

Not very helpful to say the least.

Tracing into the enable function, I reach nios2_write_config() where it performs a NIOS2_WRITE_CONFIG(bstatus). It's at this point that I have troubles.

I've tried to configure the MPU so that everything is wide open -- all data is available for R/W access and all instruction regions are available for execution. No difference. Added to that I've tried to mark everything as uncached. No difference.

Any ideas on the proper method to troubleshoot this or what the problem might be? I never did build the example project in AN540, but I've used MMUs before (which are a bit more complicated than MPUs) and haven't run into problems like this before.

Thanks,

--tim

--- Quote End ---

Same problem with Quartus 9.1, on a Cyclone system (1C20) with SDRAM (16MB) and FLASH (8MB) memories. Two MPU instruction regions with 64byte boundaries and tree MPU data regions with 64byte boundaries defined.

When I run the AN540 example project the software doesn't exit the istruction NIOS2_WRITE_CONFIG(bstatus).

Thanks

Altera_Forum · ‎04-09-2013

You have remembered to allow access to the JTAG area?

Altera_Forum · ‎04-10-2013

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You have remembered to allow access to the JTAG area?

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I've tried to reply in my sopcinfo project (see below) the same regions of the Altera project example (also the JTAG area).

https://www.alteraforum.com/forum/attachment.php?attachmentid=7050

All my software project (.text, .bss, .heap, .stack, .rodata, .rwdata, .exception) is stored in sdram. Only .entry is in ext-flash.

I've set the following limits for the MPU regions:

void nios2_mpu_data_init()

{

Nios2MPURegion region[NIOS2_MPU_NUM_DATA_REGIONS];

unsigned int num_of_region = NIOS2_MPU_NUM_DATA_REGIONS;

/* JTAG UART */

region[0].index = 0;

region[0].base = 0x84822; // Byte Address 0x021208B0 (64bytes)

region[0].mask = 0x84823; // Byte Address 0x021208B8 (64bytes)

region[0].c = 0;

region[0].perm = MPU_DATA_PERM_SUPER_RW_USER_RW;

/* JTAG debug module */

region[1].index = 1;

region[1].base = 0x84800; // Byte Address 0x02120000 (64bytes)

region[1].mask = 0x84820; // Byte Address 0x02120800 (64bytes)

region[1].c = 0;

region[1].perm = MPU_DATA_PERM_SUPER_RW_USER_RW;

/* SDRAM */

region[2].index = 2;

region[2].base = 0x40000; // Byte Address 0x01000000 (64bytes)

region[2].mask = 0x80000; // Byte Address 0x02000000 (64bytes)

region[2].c = 0;

region[2].perm = MPU_DATA_PERM_SUPER_RW_USER_RW;

/* Entire address range */

region[3].index = 3;

region[3].base = 0x0; // Byte Address 0x00000000 (64bytes)

region[3].mask = 0x2000000; // Byte Address 0x80000000 (64bytes)

region[3].c = 0;

region[3].perm = MPU_DATA_PERM_SUPER_RW_USER_RW;

nios2_mpu_load_region(region, num_of_region, 1);

}

void nios2_mpu_inst_init()

{

Nios2MPURegion region[NIOS2_MPU_NUM_INST_REGIONS];

unsigned int num_of_region = NIOS2_MPU_NUM_INST_REGIONS;

/* JTAG debug module */

region[0].index = 0;

region[0].base = 0x84800; // Byte Address 0x02120000 (64bytes)

region[0].mask = 0x84820; // Byte Address 0x02120800 (64bytes)

region[0].c = 0;

region[0].perm = MPU_INST_PERM_SUPER_EXEC_USER_EXEC;

/* SDRAM */

region[1].index = 1;

region[1].base = 0x40000; // Byte Address 0x01000000 (64bytes)

region[1].mask = 0x80000; // Byte Address 0x02000000 (64bytes)

region[1].c = 0;

region[1].perm = MPU_INST_PERM_SUPER_EXEC_USER_EXEC;

/* Entire address range */

region[2].index = 2;

region[2].base = 0x0; // Byte Address 0x00000000 (64bytes)

region[2].mask = 0x2000000; // Byte Address 0x80000000 (64bytes)

region[2].c = 0;

region[2].perm = MPU_INST_PERM_SUPER_EXEC_USER_EXEC;

nios2_mpu_load_region(region, num_of_region, 0);

}

When I run the code the exception handler executes and shows the Cause Symbol = 17 (NIOS_EXCEPTION_DATA_REGION_VIOLATION).

Thanks a lot

Altera_Forum · ‎04-10-2013

I can't remember if the MpU saves the faulting address for you.

In any case, if the exception handler is running you should be able to find the faulting instruction and all the register values - and hence find out why it is trapping.

Running the MPU is pretty pointless until you've sorted out the diagnostic error reporting!

Altera_Forum · ‎04-10-2013

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I can't remember if the MpU saves the faulting address for you.

In any case, if the exception handler is running you should be able to find the faulting instruction and all the register values - and hence find out why it is trapping.

Running the MPU is pretty pointless until you've sorted out the diagnostic error reporting!

--- Quote End ---

The problem was an interrupt related to a SYS_CLK_TIMER in a memory range I didn't consider in MPU data regions.

Disabling the interrupt or setting new mpu data regions limit the project works well.

Thanks a lot again

fgubelli