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Altera_Forum
Honored Contributor I
2,063 Views

MSI-X Interrupt is not generating on Cycleon V FPGA board

I am working on X86 PCIe Linux Driver to implement MSI-X Interrupt on Cycleon V FPGA board with reference design taken from Qsys. 

 

I have followed below steps in linux driver to enable MSI-X interrupt. 

 

1) Enabled PCIe Device 

 

2) Executed pci_enable_msix with total number of 4 vectors which is successfully enabled without any fail-case. 

 

3) After that, Disable Legacy Interrupt by setting 0 to 10th bit of PCI_COMMAND Configuration Space Register. 

 

4) Enabled DMA Mask Bit of PCI Cnfiguration (PCI_Command) Register. 

 

5) After that, Request IRQ based on getting vector value of MSIX Entries which allocated successfully without any issue. 

 

6) Than, I have triggered IRQ by writing data into IRQ source which writes some data into TXS Port but not getting interrupt event. 

 

 

Please find below sample code for more information. 

 

status = pci_enable_msix(dev, msix_entries, nr_entries); pci_read_config_dword(dev, PCI_COMMAND, &temp); pci_write_config_dword(dev, PCI_COMMAND, (temp & 0xFFFFFBFF)); /// To Disble Legacy Interrupt (set 0 to 10th bit) pci_read_config_dword(dev, PCI_COMMAND, &temp); /* Enable DMA Mask Bit of PCI Cnfiguration (PCI_Command) Register */ if (dma_set_mask(&(dev->dev), DMA_BIT_MASK(32))) { dev_err(&dev->dev," No suitable DMA available for 32 Bit.\n"); } else printk(KERN_INFO " Set 32 Bit DMA Mask Successfully...\n"); if (dma_set_mask(&(dev->dev), DMA_BIT_MASK(64))) { dev_err(&dev->dev," No suitable DMA available.\n"); } else printk(KERN_INFO " Set 64 Bit DMA Mask Successfully...\n"); pci_set_master(dev); dev->irq = msix_entries.vector; if (request_irq(dev->irq, sls_sdhc_irq, 0, DRV_NAME, (void*)dev)) printk(KERN_ERR "Error allocating interrupt.\n"); else printk(KERN_ERR "Interrupt allocated successfully.\n"); 

 

So, All above settings are configured successfully without any issue but I am not getting print from interrupt handler. so, it seems that interrupt is not generated yet. 

 

Please let me know if anyone has any solution or any idea for this type of issue. 

 

Regards, Ritesh Prajapat
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8 Replies
Altera_Forum
Honored Contributor I
47 Views

Hi, 

 

Does any one has idea or clue to solve this type of issue? 

 

Regards, 

Ritesh Prajapati
Altera_Forum
Honored Contributor I
47 Views

Hi. 

I have problem with MSI/MSI-X interrupts, only one interrupt works. 

 

 

--- Quote Start ---  

 

2) Executed pci_enable_msix with total number of 4 vectors which is successfully enabled without any fail-case. 

 

--- Quote End ---  

 

 

What number is passed from function? I can not get zero number from this function. Any other number means error.
Altera_Forum
Honored Contributor I
47 Views

Function pci_enable_msix() assigns interrupt vectors for struct msix_entry. What numbers are contained in this structure after function execution?

Altera_Forum
Honored Contributor I
47 Views

Hi, 

 

Our FPGA Design contains total 4 MSI-X Interrupt Table Size and I have passed "nr_entries=4" in pcie_enable_msix function which successfully executed without any issue. 

 

Good News is that I am able to get MSI-X Interrupt successfully in my Linux Host Machine by changing "Avalon MM Address Width" to 64 instead of 32 as we have analyzed that MSB bit of MSI-X Structure Address is chaanged while using 32 bit Address Width (means value of MSI-X Structure Address is changed from 0xFEE0C000 to 0x7EE0C000). 

 

So, PCIe IP Core is not able to generate MSI-X Interrupt due to MSI-X Structure Address mismatched. 

 

I have also contacted to Altera Service Request and confirmed that I need to set Avalon MM Width to 64 to use MSI-X Interrupt and it won't work in 32 bit Avalon MM Address Width. 

 

 

Regards, 

Ritesh Prajapati
Altera_Forum
Honored Contributor I
47 Views

Hi, 

 

I am able to get total 4 MSI-X Interrupt successfully in my design with just changing Avalon MM Address Width from 32 to 64 bit.  

 

Regards, 

Ritesh Prajapati
Altera_Forum
Honored Contributor I
47 Views

Hi Ritesh.Thanks for your reply. 

In my case, if I enable more than one MSI-X the function pci_enable_msix_range() returns negative number. I use 64 bit address. I try use MSI, but situation is same (works only one interrupt).
Altera_Forum
Honored Contributor I
47 Views

Hi andrei, 

 

First of all, Tell me that are you using Linux Host System or Windows Host System to implement MSI-X Interrupt Service Routine in your design? if Linux Host System than which Linux Kernel Version are you using? 

 

There is one function called "pci_msix_vec_count" which returns total number of MSI-X Interrupt Vectors assigned in your design if you are using Linux Host System and Linux Kernel Version is >= 3.14. 

 

So, Please let me know output of above function if you are using Linux Host System and Linux Kernel Version is >= 3.14. 

 

Also confirm with Altera Provider that MSI-X Interrupt Component you have used is proper if you are using MSI-X Interrupt Component Provided by him. 

 

Regards, 

Ritesh Prajapati
Altera_Forum
Honored Contributor I
47 Views

Hi andrei, 

 

sorry for late above reply as I was on Vacation for one Week. 

 

Regards, 

Ritesh Prajapati
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