Memory Test Failed when testing SRAM implemented in QSYS
I am trying to implement an interface for an external SRAM in Qsys. I used a Generic Tri-State Controller connected to a Tri-State Conduit Bridge. I am quite new to FPGAs, so this may not be the correct way to implement the SRAM interface. When I try to test the SRAM using the memory test application on NIOS I receive the error "-Data bus test failed at bit 0x1".