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Altera_Forum
Honored Contributor I
735 Views

Missing instruction execution when interrupt is received

My project is written in assembly. When I receive an IRQ, the program immediately goes to the exception section, but when returning it goes to the next instruction after the previous instruction. I know that it is typical for the instruction to fully complete before handling the IRQ. Why am I not seeing this? This has been confirmed by both the debugger, and signal tap. I am using eret to return from the ISR, and am pushing/popping the ra to and from the stack before leaving the ISR. The only thing I can think of is subtracting 4 from my PC inside the handler. Thoughts?

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Altera_Forum
Honored Contributor I
32 Views

Well, I found this document which states the following:  

 

ftp://ftp.altera.com/up/pub/tutorials/de2/computer_organization/tut_nios2_introduction.pdf 

 

Section 9.2 

 

upon completion of the interrupt-service routine, the execution control is returned to the interrupted program by means of the eret instruction, as explained above. however, since an external interrupt request is handled without first completing the instruction that is being executed when the interrupt occurs, the interrupted instruction must be re-executed upon return from the interrupt-service 

routine. to achieve this, the interrupt-service routine has to adjust the contents of the 

ea register which are at this time pointing to the next instruction of the interrupted 

program. hence, the value in the ea 

register has to be decremented by 4 prior to executing the eret instruction. 

 

Sounds like your handler must decrement 4 from the ea in order to jump back to the correct pre-irq location. I find it rather odd that this must be done. I figured this would automatically be done "behind the scenes". Oh well, glad I figured it out. Hope this helps others as well.
Altera_Forum
Honored Contributor I
32 Views

Upon entering exception, the Exception Address (EA) register take and store the PC+4 value. Performing a direct eret will result in Nios to continue to execute code at PC+4. Therefore, you will need to decrement by 4 the EA register before the eret so that Nios can re-execute the instruction that has taken the interrupt at the first place. 

 

I think that should already handled by the Nios II HAL code. Of course, if you are not using this, you must be a very advanced user.
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