My design successfully compiled on Quartus II v.11.0 sp1, and i try to simulate it using Modelsim-Altera web free edition 10.0 C. I open a new project (.mpf)on modelsim_ Altera V. 10.C and add the (.vho) files from simulation directory of the design ( I use this method along the different stages of the project and I succeeded to simulate every module of the project separately- all of them are VHDL no mixed design languages- , the problem appears at the last stage when i combined all the modules together). in modelsim_Altera (.vho) files compilation succeeded but when simulating the following message appears:** Fatal: (vsim-4) ****** Memory allocation failure. ***** * * Attempting to allocate 29707280 bytes * * Please check your system for available memory and swap space. * * Time: 0 ps Iteration : 0 Root : / File : NOFILE * Fatal error while loading design * Error loading design My response was reviewing the swap space i increase it many times till the extreme (300 giga bytes) but the same response. i tried with different versions of Modelsim_Altera (V. 6.0, 10.0 C, 10.0 D). I also try to compile the project using different chip rather than stratixIII, I used Arria II, but the same response when simulation. ? are am I go in the right or wrong way? is the design large to be simulated using web free edition? please give me response about that, and how i can overcome this problem. thanks in advance.
Thank you Tricky for fast response, Yes sir i tried a different version of modelsim but all are web editions :(Modelsim_Altera V. 6.0, 10.0 C, 10.0 D), unfortunately I haven’t a licensed version.
I forgot to tell you that all of them give me the same response but one of them - the older V. 6.0 - add another error message that the design exceed the limit of simulation capability of this version, but this is not occurred in the newest versions just memory allocation failure message.
When you use Altera Starter edition, and trying to compile libraries, very common to get warring like this : Warning: Design size of 0 instances exceeds ModelSim ALTERA recommended capacity. In your case, try to increase the iteration limit (Simulate-Runtime Options) and check it. I had a similar problem with Modelsim 10.c, but you may try also with 6.6d.If above option is also not working. As tricky said, there might be problem in the design.
My project consists of many files some of them VHDL code and the others in (.bdf) format and i used many mega function components. thanks Mr. kkr for help, I tried your advice and got the following error message that https://www.alteraforum.com/forum/attachment.php?attachmentid=8210 attached
--- Quote Start --- My project consists of many files some of them VHDL code and the others in (.bdf) format and i used many mega function components. thanks Mr. kkr for help, I tried your advice and got the following error message that https://www.alteraforum.com/forum/attachment.php?attachmentid=8210 attached --- Quote End --- I am unable to see your attached file. However, You close your Modelsim, open again, and run.