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Altera_Forum
Honored Contributor I
1,301 Views

Modified *.dts for custom driver to *.dtb conversion

Thanks in advance. 

I'm working with Quartus 14.1 and linux kernel 3.9.0 with the Altera SoC Cyclone V Dev Board and the Golden Design. 

I've successfully created a new project that has added a pll and a simple custom ip. 

I need a driver for the simple custom ip. In the olden days with the NiosII and MMU system I'd generate a *.dts and 

then modify the *.dts to have my driver information. 

So, what I've done is created a *.dts using the: 

sopc2dts -i filename.sopcinfo -o out.dts --type dts -b soc_system_board_info.xml -b ... (AS PER ROCKBOARD INSTRUCTIONS - don't have it in front of me) 

When I generate the *.dts I get that my custom IP and the pll are unknown. In the olden days of MMU NiosII I used to modify the: 

compatible= "unknown,unknown-1.0" in the *.dts file and then created a *.dtb from that. 

And, what do I do with the new pll?  

So, now what do I use to go from this modified *.dts to the *.dtb that I need?  

Or can I use an *.xlm file to define this and go straight from the *.sopcinfo to the *.dtb? 

Is there more than one option to generate the *.dtb I need and if so 

what is recommended.
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10 Replies
Altera_Forum
Honored Contributor I
105 Views

I've heard in the forums that there are problems with sopc2dts in converting a dtb to a dts file. Not all the information in the dtb is written to the dts file. I'd start with a known good dts and create a dtb from it using sopc2dts. Once you've verified that, add an entry for your device and convert to dtb.

Altera_Forum
Honored Contributor I
105 Views

Can you clarify please. 

 

Right now I'm going from an *.sopcinfo to the *.dts file. I know how to modify the *.dts file to add my custom IP information. But what commands do I use to go from a *.dts file to a *.dtb file?  

I have never seen that done. I'll look at the help now but any insight would be appreciated. 

 

Or are you saying that going from *.sopcinfo to *.dts file actually generates the *.dtb to generate the *.dts file that is probably bad?
Altera_Forum
Honored Contributor I
105 Views

O.K. in Quartus 14.1 there is no longer the "dtc" but in 13.1 there is -- So, I'm going to try and use that to generate a *.dtb from my 14.1 generated *.dts. as shown on the Rocketboard webpage: 

http://rocketboards.org/foswiki/documentation/gsrd131devicetreegenerator  

 

Does this make sense?
Altera_Forum
Honored Contributor I
105 Views

I'm saying that going from the binary .dtb file to a text .dts file is buggy. Or was at one time. I don't know the current state. 

 

I use quartus 14.1.1 and it has dtc. Are you running it from the EDS command shell? It won't work from the NIOS command shell.
Altera_Forum
Honored Contributor I
105 Views

 

--- Quote Start ---  

I'm saying that going from the binary .dtb file to a text .dts file is buggy. Or was at one time. I don't know the current state. 

 

I use quartus 14.1.1 and it has dtc. Are you running it from the EDS command shell? It won't work from the NIOS command shell. 

--- Quote End ---  

 

 

I got a .dtb file from my .dts file but it hangs at: Starting kernel 

 

So taking your suggestion of starting with a good known .dts file I'm hoping that there is one in the GSRD files (I'm not at that computer right now). 

 

I did learn something about Qsys and generating the *.sopcinfo with the proper information for your new IP.  

Adding Device Tree Generation Support to an IP Block at  

http://www.rocketboards.org/foswiki/documentation/devicetreegenerator131#adding_device_tree_generati... 

you can add to the .tcl file for that IP and generate what you need so the sopc2dts conversion has all the information it needs.
Altera_Forum
Honored Contributor I
105 Views

SOLVED -- Using 14.1 tools and a suggestion - 

I took the GSRD *.dtb file used the sopc2dts (NOT IN THE COMMAND SHELL) and made a *.dts file. I added my custom IP and the pll as a fixed clock - like "clk_0" is in the GSRD into that "clocks" section. 

 

pll_0: pll_0 { 

compatible = "fixed-clock"; 

# clock-cells = <0>; 

clock-frequency = <1843198> /* 1.843198 MHz PUT YOUR VALUE HERE */ 

clock-output-names = "pll_0_outclk0"; 

}; //end pll_0 (pll_0) 

 

THEN I GENERATED A *.dtb file using the 14.1 "dtc" 

 

# ] ./dtc -I dts -O dtb -o socfpga.dtb socfpga-AddedMyIPs.dts 

 

THIS BOOTS so now I need to try my device driver, etc
Altera_Forum
Honored Contributor I
105 Views

Good to know you got it working. It's also good to know that the dtb to dts conversion is now working. I saw a forum post that said that it is possible to add tcl to the *_hw.tcl file for a custom component to automatically add driver information to the sopcinfo file so that the generated database will have whatever you add so that your driver can reference that data when initializing. I'd planned on trying that out, but so far I don't have a component that I'd like to use in more than one project.

Altera_Forum
Honored Contributor I
105 Views

 

--- Quote Start ---  

Good to know you got it working. It's also good to know that the dtb to dts conversion is now working. I saw a forum post that said that it is possible to add tcl to the *_hw.tcl file for a custom component to automatically add driver information to the sopcinfo file so that the generated database will have whatever you add so that your driver can reference that data when initializing. I'd planned on trying that out, but so far I don't have a component that I'd like to use in more than one project. 

--- Quote End ---  

 

 

I did add to the *_hw.tcl for my custom IP and that did work. That is on the rocketboard page -- don't have the link right now. 

 

The issue was that the pll_0 was not defined. So I used what was generated for the custom IP and added the pll_0 information so I'd have a good *.dtb 

 

I'm figuring there must be a way to add the "pll_0" information to a *.xml file and use the --board pll_define.xml to utilize the "sopc2dts" directly??
Altera_Forum
Honored Contributor I
105 Views

Is it really even necessary to have PLL information in the dtb file? That's used strictly by software. What does your software do that it needs to know about the PLLs in the FPGA portion? I've not found that necessary.

Altera_Forum
Honored Contributor I
105 Views

I BELIEVE IT IS. My custom IP uses this PLL and if you don't have it defined when you create the .dtb file there is a error.  

 

Now, since I saw the error - I assumed that the .dtb file was not created... maybe the .dtb file was created. If it was and I could have tried it without adding the pll information.