NIOS 2 Instruction Master Address Range

Altera_Forum · ‎05-28-2004

I've down loaded the NIOS 2 tools and installed.

I'm converting an existing design to NIOS 2. The design has a large number of FLASH devices; 19 of the 256 MBit type. Also a 259 MBit SDRAM.

I've put my periferrals (UARTs and Timers) starting at address 0x00

So my first allowable location for one of these 256 MBit device is at loc 0x200 0000 (spaces added for clarity)

All goes well till I need to place a device at 0x1000 0000

I get a message about "Address range of instruction master crossing a 256MByte boundary. Not supported"

I only need instructions in a few of these devices. The bulk 16 or so will only be used for data storage.

Did I miss something?

How can I access large Flash Array.? I'm willing to give up the CFI features.

Thanks

George Martin

www.embedded-designer.com

Altera_Forum · ‎06-01-2004

Hi,

The 256Mbyte address range limitation is only for instruction masters.

In SOPC builder make sure your non instruction components are not connected to the CPU instruction master interface and that all of your instruction master parts are grouped inside the 256Mbyte limit.

SOPC builder will show you (and allow you to edit) what is connected to the instruction master. From the menu

View--> show master connections.

Clicking on the dot next to your device will change whether it is connected or not. Hollow = not connected. Solid = connected.

Altera_Forum · ‎06-02-2004

I understand what you are saying.

However when I open the SOPC Builder and look at bus connections I see that I can hook up a UART to either Data or Instrunction Master. The same for the SDRAM. But.......

I've added Common FLASH interface devices and I get no dots to select from.

I've also added Interface to User Logic devices and I also get no dots.

So it looks like any memory that I attach using either the CFI or Interface to USer Logic gets placed on the instruction master.

Am I missing something??

George

Altera_Forum · ‎06-12-2004

The CFI Flash component is probably an Avalon-Tristate-Bridge bus interface, not pure Avalon, so you must attach it to the master from an Avalon-Tristate-Bridge. The Avalon-Tristae-Bridge slave is then the slave that you connect the Nios master to so the Nios can access the CFI flash.