Hello,I tried the tutorial "tut_sopc_introduction_vhdl" and "myfirstniosii.pdf". Both are on a System CD from terasIC and both don't work on my PC. When I try the Altera Monitor Program Tutorial all is okay (I can compile and load the demo programm basic computer de2-115). But when I try the sopc introduction tutorial I got these message in the Info&Error Box: Info: ******************************************************************* Info: Running Quartus II 32-bit Programmer Info: Version 12.0 Build 178 05/31/2012 SJ Web Edition Info: Copyright (C) 1991-2012 Altera Corporation. All rights reserved. Info: Your use of Altera Corporation's design tools, logic functions Info: and other software and tools, and its AMPP partner logic Info: functions, and any output files from any of the foregoing Info: (including device programming or simulation files), and any Info: associated documentation or information are expressly subject Info: to the terms and conditions of the Altera Program License Info: Subscription Agreement, Altera MegaCore Function License Info: Agreement, or other applicable license agreement, including, Info: without limitation, that your use is for the sole purpose of Info: programming logic devices manufactured by Altera and sold by Info: Altera or its authorized distributors. Please refer to the Info: applicable agreement for further details. Info: Processing started: Sun Jun 02 16:33:07 2013 Info: Command: quartus_pgm -c "USB-Blaster [USB-0]" -m jtag -o P;C:\altera_tutorials\sopc_tutorial_vhdl\light.sof Info (213045): Using programming cable "USB-Blaster [USB-0]" Info (213011): Using programming file C:/altera_tutorials/sopc_tutorial_vhdl/light.sof with checksum 0x00562AB9 for device EP4CE115F29 Info (209060): Started Programmer operation at Sun Jun 02 16:33:09 2013 Info (209016): Configuring device index 1 Info (209017): Device 1 contains JTAG ID code 0x020F70DD Info (209007): Configuration succeeded -- 1 device(s) configured Info (209011): Successfully performed operation(s) Info (209061): Ended Programmer operation at Sun Jun 02 16:33:15 2013 Info: Quartus II 32-bit Programmer was successful. 0 errors, 0 warnings Info: Peak virtual memory: 181 megabytes Info: Processing ended: Sun Jun 02 16:33:15 2013 Info: Elapsed time: 00:00:08 Info: Total CPU time (on all processors): 00:00:09 Compiling source files... nios2-elf-as --gstabs -I C:/altera/12.0/quartus/../nios2eds/components/altera_nios2/sdk/inc -I C:/altera_tutorials/sopc_tutorial_vhdl C:/altera_tutorials/sopc_tutorial_vhdl/app_software/lights.s -o C:/altera_tutorials/sopc_tutorial_vhdl/lights.s.o C:/altera_tutorials/sopc_tutorial_vhdl/app_software/lights.s:0: Warning: end of file not at end of a line; newline inserted Linking... nios2-elf-ld --defsym nasys_program_mem=0x1000 --defsym nasys_data_mem=0x1000 --section-start .exceptions=0x1020 --section-start .reset=0x1000 -e _start -u _start --script c:/altera/12.0/University_Program/Monitor_Program/build/nios_as_build.ld -g -o C:/altera_tutorials/sopc_tutorial_vhdl/lights.elf C:/altera_tutorials/sopc_tutorial_vhdl/lights.s.o ELF generated at C:\altera_tutorials\sopc_tutorial_vhdl\lights.elf. nios2-elf-objcopy -O srec C:/altera_tutorials/sopc_tutorial_vhdl/lights.elf C:/altera_tutorials/sopc_tutorial_vhdl/lights.srec SREC generated at C:\altera_tutorials\sopc_tutorial_vhdl\lights.srec. There are no Nios II CPUs with debug modules available which match the values specified. Please check that your PLD is correctly configured, downloading a new SOF file if necessary. When I want to run the Hallo World Program for the tutorial myfirstniosii.pdf I can't get a connection between my PC and the board. There is something what I don't understand and what is confusing me. I also have problems when I don't use the stand alone programmer from Altera. In a thread I read that somebody has a similar problem and got the same message. Someone told him to execcute jtagconfig -n and post the outtake. My outtake is: [NiosII EDS]$ jtagconfig -n 1> USB-Blaster [USB-0] 020F70DD EP3C120/EPCE115 Thanks in advance!
I have some "Warnings" when I compile the project in Quartus II:
Warning (20013): Ignored assignments for entity "nios_system" -- entity does not exist in design Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_NAME sopc -entity nios_system -qip nios_system.qip was ignored Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_VERSION 12.0 -entity nios_system -qip nios_system.qip was ignored Warning (20014): Assignment for entity set_global_assignment -name IP_TOOL_ENV sopc -entity nios_system -qip nios_system.qip was ignoredDoes it matter? Thanks for any help!
Hi,I changed the processor to NiosII/e and Debug level 1, because I use Web Edition and I have no licence. But some say that when the DE2-115 is connected via USB to my host PC then I can use also the NIOS II Processor /f. I generate the system in SOPC Builder and compile in QuartusII. Now, I load the sof file succesfully to the fpga and with the Altera Monitor Program I compile and load the files. But it is the same error. I think a licence can't be the problem. There are no Nios II CPUs with debug modules available which match the values specified. Please check that your PLD is correctly configured, downloading a new SOF file if necessary. I use Quartus 12.0 Web Edition, Nios II EDS 12.0, Nios Legacy Tools 12.0 with SP2, Quartus II Programer 12.0 and Altera Monitor Program 12.0. OS is Windows 7 Home Premium 64bit.
Some here in the forum wrote that it helps when they delete the sof file and the ptf file. Then I compile new files. But still the same error message in the Altera Monitor Program.There are no Nios II CPUs with debug modules available which match the values specified. Please check that your PLD is correctly configured, downloading a new SOF file if necessary.