I am using Quartus 19.1 and have a Qsys NIOS II processor with a 3 wire SPI core. I setup the number of slaves to be 20, which is consistent with the generated VHDL code, as the slave select signal SS_n is a standard logic vector (19 downto 0).
In the NIOS code, if I select a slave ID that only relies on the lowest 16 bits, everything works well. for example if slave select is (alt_u32) 0x1, SS_n is low and the others are high. If slave select is (alt_u32) 0x8000, SS_n is low, and the others are high. Great.
But, if slave select is (alt_u32) 0x10000, all the slave select lines SS_n are high, while I would expect SS_n to be low.
I am a bit confused, as the data type for slave select in all the routines is alt_u32, and the signal width definitely implies that more than 16 bits can be used.