Nios® II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.

NIOS II Standalone Operation

Altera_Forum
Honored Contributor II
856 Views

I have a NIOS II built using QSYS with ram/rom on a chip. I have my program running from the console under the NIOS II Software Build tools for eclipse. Now I want to run the NIOS untethered from my development system. 

 

I've added the meminit.qip to the project files list, and I've switched over the BSP file from using the JTAG UART to using the standard UART. 

 

I've run clean, and I've recompiled the program and also recompiled the FPGA. I program the bitstream into the configuration device and power cycle the system, but the program doesn't seem to run. By not running, I mean the processor doesn't flash an LED. The FPGA is being loaded correctly. 

 

Is there anything else I should be doing? 

 

(I suspect someone else has posted something like this, but I couldn't find it; feel free to point me to an old discussion. Also, I accidentally posted this on the general discussion; my apologies for the duplication)
0 Kudos
4 Replies
Altera_Forum
Honored Contributor II
97 Views

Hi, multiplied posts (http://www.alteraforum.com/forum/showthread.php?t=41956).... Apologies accepted :-) 

 

Which Quartus & Nios Versions ? which operating system (Windows...) ? 

 

Have you recompiled the SOPC (or QSYS) before recompiling the whole project ? 

 

Are you sure about the UART ? Just make simple programs ... and see.... 

 

Regards
Altera_Forum
Honored Contributor II
97 Views

OK. Here's where I am... 

 

When I look at the RAM, it seems to default to SRAM.HEX, despite what I think the QIP file is supposed to be telling it. I don't have an SRAM.HEX. The file is called something else. However, when I search for .HEX files, the only ones that come up are really old, which tells me that the development environment isn't creating this file. 

 

I think the question now changes to: How do I set the development environment or linker options or ??? to automatically create this .HEX file? 

 

Thanks
Altera_Forum
Honored Contributor II
97 Views

I had mistakes when Qsys component is NOT at the project directory. Maybe it helps you. 

For .HEX, I have no answer.
Altera_Forum
Honored Contributor II
97 Views

If you can run the debugger and the code runs fine, but when you download the SOF or voot from FLASH it does nothing, Open up QSYS and disconnect the JTAG debug module reset line from the reset input to the NIOS. In QSYS, if you have enabled the debugger within the NIOS GUI parameters window, this is the reset line coming out of the NIOS module. I found that to be the source of my problem. You can still run the debugger, just click on the checkbox to reset the processor before connecting.

Reply