I am currently working to implement a NIOS on a CvP design on the Peripheral portion.I've taken the .sof, which contains the peripheral and core portions of my CvP design and loaded it onto my Stratix 5. I am running into issues when attempting to run my application, I get the error: No Nios II target connection paths were located. Check connections and that a Nios II .sof is downloaded. After seeing this failure, I stripped down my project to just the NIOS II, and it runs a hello world application fine using the same clk and reset pins. Does anyone have any idea on what could be going on? Thanks.
Hi,Recompile the project with the CvP mode disabled, to generate a new .sof and try. or try with the reference design. https://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/ug/ug_cvp.pdf Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
I've disabled CvP, regenerated my .sopcinfo, and recompiled my project. Now the NIOS is working, so that is a step in the right direction.Are there any special settings that need to be configured for NIOS to run with CvP enabled?
Hi,Kindly check the link session "FPGA Configuration using CvP". Also, refer to the design examples. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation)
Anand,Sorry for being unclear, but my design was already working with CvP enabled. I am currently wanting to add a NIOS to the peripheral portion of the design, but once I do, the NIOS EDK cannot find the NIOS core.