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Honored Contributor I
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Need to Flush L2 cache on Cyclone V even though disabled ?

I've been trying to turn on the L1 data cache during the decompression of my OS and struggling to get it working. I found that even though I could boot into the resulting OS image, 'random' 32-byte ranges were incorrect. I have memory barrier instructions and L1 cache cleaning code and had proved the problem tracked with turning on the L1 cache. Only one core is operating during the boot process. I also tried evicting things from the cache by loading more than 32kbytes of data through it in case I had some issue with my cache cleaning code that I wasn't seeing. 

 

Finally I added L2 cache cleaning and L2 cache sync and now it appears to be working reliably. 

 

I'm confused by this. I don't enable the L2 cache. The documentation says it is disabled on power up. I added code to make sure it was off in its control register. 

 

I haven't tried to see if it is only the sync that is needed, but it doesn't really matter. At this point I'm operating by experimentation results rather than understanding or knowledge. 

 

Why must I clean and/or sync the L2 cache if it is disabled ? 

 

Thanks for any insights, 

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